SI5330F-B00214-GM vs SI5330F-B00215-GM Comparación
Comparación detallada lado a lado de SI5330F-B00214-GM por Skyworks Solutions y SI5330F-B00215-GM por Skyworks Solutions. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Skyworks Solutions
SI5330F-B00214-GM - 1:8 LVCMOS Clock Buffer | Skyworks | 200MHz
SI5330F-B00214-GM ✓ ActivoSkyworks Solutions
SI5330F-B00215-GM - 1:8 200MHz Clock Fanout Buffer | Skyworks
SI5330F-B00215-GM ✓ ActivoComparación de especificaciones
| Parámetro | SI5330F-B00214-GM | SI5330F-B00215-GM |
|---|---|---|
| Marca | Skyworks Solutions | Skyworks Solutions |
| Categoría | Clock & Timing | Clock & Timing |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $2,21 | $2,62 |
| Función | Clock Fanout Buffer, Level Translator | Clock Fanout Buffer (Distribution), Translator |
| Number of Inputs | 1 | 1 |
| Número de salidas | 8 (single-ended) or 4 (differential) | 8 single-ended or 4 differential |
| Input Type | Single-ended CMOS/SSTL/HSTL or Differential LVPECL/LVDS/HCSL | — |
| Tipo de salida | LVCMOS (single-ended) or LVPECL/LVDS/HCSL (differential) | — |
| Maximum Frequency | 200 MHz | 200 MHz |
| Tensión de alimentación | 1.8 V, 2.5 V, or 3.3 V | 1.8 V / 2.5 V / 3.3 V |
| Temperatura de funcionamiento | -40 C to +85 C | -40 C to +85 C |
| Encapsulado | 24-pin QFN Exposed Pad (4x4 mm) | 24-VFQFN Exposed Pad |
| Tipo de montaje | Surface Mount | Surface Mount |
| Output Skew (Bank-to-Bank) | [DATA_NEEDED: bank-to-bank skew value] | — |
| Additive Jitter | Sub-picosecond RMS typical (non-PLL architecture) | 0.15 ps RMS |
| Output Dividers | ÷1, ÷2, ÷4, ÷8 selectable per output pair | — |
| Output Enable Pins | Yes, per output | — |
| Estado RoHS | Compliant | Compliant |
| Ratio | — | 1:8 |
| Minimum Frequency | — | 5 MHz |
| Output Skew | — | Sub-100 ps (typ.) |
| Output Formats | — | LVPECL, LVDS, HCSL, CMOS, SSTL, HSTL |
| Input Format | — | Single-ended or differential |
| Output Enable | — | Per-output shutdown control |
| Clock Monitoring | — | Yes (failure detection) |