SI5341B-D11825-GMR vs SI5340A-D-GM Comparación
Comparación detallada lado a lado de SI5341B-D11825-GMR por Skyworks Solutions y SI5340A-D-GM por Skyworks Solutions. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Skyworks Solutions
SI5341B-D11825-GMR - 10-Output Clock Generator | Skyworks
SI5341B-D11825-GMR ✓ ActivoSkyworks Solutions
SI5340A-D-GM - 1028 MHz Ultra-Low Jitter 4-Output Clock Gen | Skyworks
SI5340A-D-GM ✓ ActivoComparación de especificaciones
| Parámetro | SI5341B-D11825-GMR | SI5340A-D-GM |
|---|---|---|
| Marca | Skyworks Solutions | Skyworks Solutions |
| Categoría | Clock & Timing | Clock & Timing |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $4,21 | $14,75 |
| Función | Clock generator, 10 outputs | Clock generator, any-frequency, any-output |
| Output Frequency Range | up to 350 MHz per output | — |
| Número de salidas | 10 | 4 |
| Number of Inputs | 2 (differential) [DATA_NEEDED: input frequency range] | — |
| Output Jitter (RMS) | [DATA_NEEDED: jitter value] - sub-200 fs RMS typical per family datasheet | — |
| Tipo de salida | CML, LVDS, LVCMOS, HCSL, LVPECL (programmable) [DATA_NEEDED: exact driver list per -D11825 order code] | — |
| Input Type | Differential crystal or reference clock | — |
| Control Interface | I2C / SPI | I2C / SPI |
| Frequency Synthesis Method | MultiSynth fractional-N | — |
| Tensión de alimentación | [DATA_NEEDED: VDD range and number of rails] | 1.71 V to 3.47 V (core); 1.8 V / 2.5 V / 3.3 V typical |
| Temperatura de funcionamiento | -40C to +85C | -40 C to +85 C (industrial) |
| Encapsulado | 64-VFQFN Exposed Pad | 44-pin QFN (7x7 mm) with exposed pad |
| Tipo de montaje | Surface Mount | Surface Mount |
| Nivel MSL | [DATA_NEEDED: MSL rating] | 3 |
| Estado RoHS | Compliant | Compliant |
| Configuration | Factory pre-programmed frequency plan (suffix -D11825-) | — |
| Number of References | — | 4 |
| Maximum Output Frequency | — | 1028 MHz |
| Output Logic | — | LVPECL, LVDS, HCSL, CMOS, CML (per output) |
| Phase Jitter (12 kHz to 20 MHz) | — | 0.09 ps RMS (typical) |
| Frequency Synthesis Modes | — | Integer and fractional (MultiSynth) |
| Output Enable / Disable | — | Per-output |
| Family | — | Si5340 / Si5341 |
| Order Code Suffix | — | -D (4-output default frequency plan) |
| Manufacturer | — | Skyworks Solutions Inc. (formerly Silicon Labs) |