SI5344B-D-GM vs SI5345B-D-GM Comparación
Comparación detallada lado a lado de SI5344B-D-GM por Skyworks Solutions y SI5345B-D-GM por Skyworks Solutions. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Skyworks Solutions
SI5344B-D-GM - 4-Output Jitter Attenuator, 350 MHz | Skyworks
SI5344B-D-GM ✓ Activo
Comparación de especificaciones
| Parámetro | SI5344B-D-GM | SI5345B-D-GM |
|---|---|---|
| Marca | Skyworks Solutions | Skyworks Solutions |
| Categoría | Clock & Timing | Clock & Timing |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $11,05 | $8,55 |
| Función | Clock multiplier and jitter attenuator | 10-channel any-frequency jitter attenuator / clock multiplier |
| Número de salidas | 4 | 10 |
| Output Frequency Range | Up to 350 MHz per output | 0.001 MHz to 350 MHz |
| Input Frequency Range | 0.008 MHz to 750 MHz | — |
| Number of Inputs | 1 reference input | — |
| Tipo de salida | Differential or single-ended (programmable) | — |
| Jitter Performance | Sub-100 fs RMS typical (12 kHz to 20 MHz) | — |
| Programmable Memory | In-circuit programmable non-volatile memory (NVM) | — |
| Configuration Interface | I2C / SPI serial interface | — |
| Jitter Attenuation Bandwidth | Digitally programmable | Digitally programmable |
| Technology | Fourth-generation DSPLL with MultiSynth fractional-N | DSPLL (4th gen) + MultiSynth fractional dividers |
| Encapsulado | 44-pin QFN EP, 7x7 mm | 64-pin QFN Exposed Pad (9x9 mm) |
| Rango de temperatura de funcionamiento | -40 C to +85 C | [DATA_NEEDED: operating temperature range] |
| Tipo de montaje | Surface Mount | Surface Mount |
| Estado RoHS | Compliant | Compliant |
| Phase Jitter (RMS, typical) | — | 0.09 ps |
| Reference Input Frequency Range | — | [DATA_NEEDED: reference input frequency range] |
| Tensión de alimentación | — | 1.8 V / 3.3 V (core / IO) |
| Output Logic Formats | — | LVCMOS, LVDS, LVPECL, HCSL, CML |
| Control Interface | — | I2C / SPI (serial) |
| On-chip NVM | — | Yes (in-circuit programmable, powers up configured) |
| Nivel MSL | — | [DATA_NEEDED: MSL level] |