SN74AUP1G32DCKR vs SN74AUP1G04DCKR Comparación
Comparación detallada lado a lado de SN74AUP1G32DCKR por Texas Instruments y SN74AUP1G04DCKR por Texas Instruments. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Texas Instruments
SN74AUP1G32DCKR - Single 2-Input OR Gate, 0.8-3.6V AUP | Texas Instruments
SN74AUP1G32DCKR ✓ ActivoComparación de especificaciones
| Parámetro | SN74AUP1G32DCKR | SN74AUP1G04DCKR |
|---|---|---|
| Marca | Texas Instruments | Texas Instruments |
| Categoría | Logic ICs | Logic ICs |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $0,14 | $0,09 |
| Logic Type | OR Gate | Single Inverter Gate (Y = /A) |
| Number of Circuits | 1 | — |
| Number of Inputs per Circuit | 2 | — |
| Logic Family | AUP (Advanced Ultra-low-Power) | 74AUP (AUP - Advanced Ultra-Low-Power) |
| Supply Voltage (VCC) | 0.8 V to 3.6 V | 0.8 V to 3.6 V |
| Quiescent Current (ICC max) | 0.9 uA | 0.9 µA |
| Tipo de salida | Push-Pull CMOS | CMOS, Push-Pull |
| Output Current (IOH/IOL) | 4 mA typical at 1.8 V VCC | — |
| Propagation Delay (tpd) | Approximately 3.4 ns typical at 3.3 V VCC | — |
| Capacitancia de entrada | 1.5 pF typical | — |
| Power Dissipation Capacitance (Cpd) | 4.3 pF typical at 3.3 V | — |
| Temperatura de funcionamiento | -40 C to +85 C | -40 °C to +85 °C |
| Encapsulado | SC-70-5 (DCK) 5 pins | SC-70-5 (DCK), 2.0 mm x 1.25 mm |
| Tipo de montaje | Surface Mount | Surface Mount |
| Estado RoHS | Compliant | Compliant |
| Ioff (Partial Power Down) | Supported | — |
| Input Over-Voltage Tolerance | Up to 3.6 V | — |
| Number of Channels | — | 1 |
| Absolute Maximum VCC | — | 4.6 V |
| Dynamic Power Capacitance (Cpd typ at 3.3 V) | — | 4.1 pF |
| Input Capacitance (typ) | — | 1.5 pF |
| Output Drive (at 3.3 V) | — | ±4 mA |
| Propagation Delay (typ at 3.3 V, 30 pF) | — | 5.4 ns |
| Ioff (Partial-Power-Down) | — | Supported |
| Overshoot/Undershoot | — | < 10% of VCC |
| Schmitt-Trigger Input | — | Yes |
| Nivel MSL | — | 1 (per JEDEC J-STD-020, 260 °C) |
| Output Current | — | ±4 mA |