SN74LS138 vs CD74HC138 Comparación
Comparación detallada lado a lado de SN74LS138 por Texas Instruments y CD74HC138 por Texas Instruments. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | SN74LS138 | CD74HC138 |
|---|---|---|
| Marca | Texas Instruments | Texas Instruments |
| Categoría | Logic ICs | Logic ICs |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $0,28 | $0,18 |
| Función | 3-line to 8-line Decoder/Demultiplexer | — |
| Logic Family | 74LS (Schottky-clamped TTL) | HC (High Speed CMOS) |
| Tensión de alimentación | 5 V (TTL levels) | — |
| Propagation Delay | 20 ns (typical) | [DATA_NEEDED: propagation delay at rated supply/load] |
| Outputs | 8 active-low (Y0-Y7) | 8 active-low (Y0-Y7) |
| Select Inputs | 3 (A, B, C) | 3 (A0, A1, A2) |
| Enable Inputs | 3 (G1 active-high, G2A/G2B active-low) | 3 (two active-low, one active-high) |
| Output Sink Current | 8 mA | — |
| Power Dissipation | 32 mW (typical) | — |
| Temperatura de funcionamiento | 0C to +70C | [DATA_NEEDED: operating temperature range per suffix] |
| Encapsulado | 16-PDIP (N) | 16-pin PDIP / SOIC (per ordering suffix) |
| Other Packages | SOIC (D), SOP (NS) | — |
| Tipo de montaje | Through Hole (PDIP variant) | Through-Hole (PDIP variant) / Surface Mount (SOIC variant) |
| Technology | Bipolar TTL MSI | High-speed silicon-gate CMOS |
| Estado RoHS | [DATA_NEEDED: RoHS status] | Compliant |
| Applications | High-performance memory decoding, data routing | — |
| Logic Function | — | 3-to-8 Line Decoder/Demultiplexer, inverting outputs |
| Supply Voltage Range | — | 2 V to 6 V |
| Tipo de salida | — | Inverting (active-low) |
| Corriente en reposo | — | [DATA_NEEDED: ICC quiescent current] |
| Input Logic Compatibility | — | CMOS (HC level) |
| Datasheet Document | — | SCHS147J (November 1998 - Revised November 2021) |
| Typical Use | — | Memory address decoding, data routing |