STM32MP135FAC3 vs STM32MP135AAC3 Comparación
Comparación detallada lado a lado de STM32MP135FAC3 por STMicroelectronics y STM32MP135AAC3 por STMicroelectronics. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
STMicroelectronics
STM32MP135AAC3 - 650MHz Arm Cortex-A7 MPU | STMicroelectronics
STM32MP135AAC3 ✓ ActivoComparación de especificaciones
| Parámetro | STM32MP135FAC3 | STM32MP135AAC3 |
|---|---|---|
| Marca | STMicroelectronics | STMicroelectronics |
| Categoría | Microcontrollers | Microcontrollers |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $8,64 | $5,49 |
| Core | Arm Cortex-A7 32-bit RISC | Arm 32-bit Cortex-A7 with NEON and FPU |
| Core Count | 1 | — |
| Frecuencia de reloj máxima | 1 GHz | — |
| DRAM Support | LPDDR2, LPDDR3, LPDDR, DDR3 | — |
| DRAM Interface Width | 16-bit full / 8-bit half (programmable) | — |
| LPDDR2 Compliance | JEDEC JESD209-2E | — |
| LPDDR3 Compliance | JEDEC JESD209-3B | — |
| Memory Controller QoS | 3 read / 2 write traffic classes | — |
| Encapsulado | [DATA_NEEDED: exact package marking for STM32MP135FAC3 (TFBGA361 per STM32MP1 nomenclature, confirm on datasheet)] | TFBGA361 |
| Temperatura de funcionamiento | [DATA_NEEDED: temperature grade for suffix 3] | [DATA_NEEDED: operating temperature range] |
| Tensión de alimentación | [DATA_NEEDED: core/IO supply voltage] | [DATA_NEEDED: core/IO supply voltage] |
| Tipo de montaje | Surface Mount | Surface Mount |
| Product Family | STM32MP1 (STM32MP135) | — |
| Series Status | Active | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Security Features | [DATA_NEEDED: security option per part numbering] | — |
| Core Frequency (series) | — | Up to 1 GHz |
| Speed Grade (AAC3) | — | A speed grade (650 MHz per ST eStore listing of A-grade STM32MP135 parts) |
| Display Interface | — | LCD-TFT controller |
| Camera Interface | — | Parallel camera interface |
| Ethernet | — | 2x Ethernet MAC |
| CAN | — | 2x CAN FD |
| ADC | — | 2x ADC (12-bit) |
| Timers | — | 24 timers |
| External Memory Support | — | JEDEC LPDDR2 (JESD209-2E) and LPDDR3 (JESD209-3B), 16-bit interface |
| DRAM Data Width | — | Programmable full (16-bit) or half (8-bit) |
| DRAM QoS | — | Three traffic classes on read, two on write |