T4160NSN7QTB vs T4080NSE7QTB Comparación
Comparación detallada lado a lado de T4160NSN7QTB por NXP Semiconductors y T4080NSE7QTB por NXP Semiconductors. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
NXP Semiconductors
T4160NSN7QTB - QorIQ 16x 1.67GHz SoC, 2x10GE, FCBGA-1932 | NXP
T4160NSN7QTB ✓ Activo
Comparación de especificaciones
| Parámetro | T4160NSN7QTB | T4080NSE7QTB |
|---|---|---|
| Marca | NXP Semiconductors | NXP Semiconductors |
| Categoría | Microcontrollers | Microcontrollers |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $770,00 | $695,00 |
| Architecture | Power Architecture e6500, 64-bit | PowerPC e6500, 64-bit |
| Number of Cores | 8 physical / 16 virtual threads | — |
| Core Frequency | 1.67 GHz (typical) | — |
| Family | QorIQ T4 (T4080/T4160/T4240) | — |
| Memory Controller | DDR3L, 64-bit, 1.87 GT/s | — |
| 10 Gigabit Ethernet | 2x 10GE MACs | — |
| Packet Acceleration | Data Path Acceleration Architecture (DPAA) | — |
| Cryptography | Disabled (per part designation) | Enabled (hardware crypto accelerator) |
| Encapsulado | 1932-ball FCBGA | 1932-FCPBGA (45x45 mm) |
| Temperatura de funcionamiento | 0°C to 105°C | 0 C to 105 C |
| Process Technology | CMOS, 45 nm | — |
| Revision | Rev 2 | — |
| Nivel MSL | 3 (per Partstack record) | [DATA_NEEDED: MSL rating] |
| Terminal Finish | Tin-Silver-Copper (e1, JESD-609) | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | Compliant |
| Core Count | — | 4 physical cores, 8 hardware threads |
| Maximum Core Frequency | — | 1.8 GHz |
| DDR Memory Controller | — | DDR3L up to 1.87 GT/s |
| Ethernet Interfaces | — | 2x 10 Gigabit Ethernet |
| Silicon Revision | — | 2.0 |
| Tipo de montaje | — | Surface Mount (BGA) |
| Product Family | — | QorIQ T4 |
| Tensión de alimentación | — | [DATA_NEEDED: core/IO voltage] |
| Thermal Design Power | — | [DATA_NEEDED: TDP] |
| Cache (L2 per core) | — | [DATA_NEEDED: L2 size] |