THS1230CDWR vs THS1230CDWRG4 Comparación
Comparación detallada lado a lado de THS1230CDWR por Texas Instruments y THS1230CDWRG4 por Texas Instruments. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Texas Instruments
THS1230CDWR - 12-Bit 30 MSPS Low-Power ADC | Texas Instruments
THS1230CDWR ✓ ActivoTexas Instruments
THS1230CDWRG4 - 12-Bit 30 MSPS Low-Power ADC | Texas Instruments
THS1230CDWRG4 ✓ ActivoComparación de especificaciones
| Parámetro | THS1230CDWR | THS1230CDWRG4 |
|---|---|---|
| Marca | Texas Instruments | Texas Instruments |
| Categoría | ADC/DAC | ADC/DAC |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $5,20 | $5,92 |
| Resolución | 12 bits | 12 bits |
| Sample Rate | 30 MSPS | 30 MSPS |
| Number of Channels | 1 | — |
| Supply Voltage (AVDD) | 3.3 V (single supply) | — |
| Architecture | Pipelined / multi-stage with digital error correction | — |
| Input Type | Configurable: single-ended, single-ended with offset, or differential | — |
| Analog Input Bandwidth | [DATA_NEEDED: analog input bandwidth MHz] | — |
| SNR | [DATA_NEEDED: SNR dBFS at fIN] | — |
| SFDR | [DATA_NEEDED: SFDR dBc at fIN] | — |
| INL | [DATA_NEEDED: INL LSB] | — |
| DNL | [DATA_NEEDED: DNL LSB] | — |
| Power Dissipation | <250 mW at 30 MSPS (typical) | — |
| Power-Down Mode | Yes (hardware PD pin) | Yes |
| Digital Output | CMOS, parallel 12-bit | — |
| Temperatura de funcionamiento | 0 °C to +70 °C (C-grade commercial) | -40 C to +85 C |
| Encapsulado | 28-pin SOIC (DW), 7.50 mm body width, tape and reel | 28-SOIC (DW), 0.295 inch (7.50 mm) width |
| Tipo de montaje | Surface Mount | Surface Mount |
| Nivel MSL | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL moisture sensitivity level] |
| Estado RoHS | Compliant | Compliant |
| Reference | Internal (external reference option) | — |
| Number of Inputs | — | 1 (single channel, configurable) |
| Input Configuration | — | Single-ended, single-ended w/ offset, differential |
| Analog Input Range | — | -2 V to +2 V |
| Tensión de alimentación | — | 3.3 V (single supply) |
| Corriente de alimentación | — | [DATA_NEEDED: typical supply current in mA] |
| Output Interface | — | Parallel CMOS |
| ADC Architecture | — | Pipelined |