THS1230CPWG4 vs THS1230CDWR Comparación
Comparación detallada lado a lado de THS1230CPWG4 por Texas Instruments y THS1230CDWR por Texas Instruments. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Texas Instruments
THS1230CPWG4 - 12-Bit 30 MSPS Low-Power ADC | Texas Instruments
THS1230CPWG4 ObsoleteTexas Instruments
THS1230CDWR - 12-Bit 30 MSPS Low-Power ADC | Texas Instruments
THS1230CDWR ✓ ActivoComparación de especificaciones
| Parámetro | THS1230CPWG4 | THS1230CDWR |
|---|---|---|
| Marca | Texas Instruments | Texas Instruments |
| Categoría | ADC/DAC | ADC/DAC |
| Estado del ciclo de vida | Obsolete | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $5,62 | $5,20 |
| Resolución | 12 bit | 12 bits |
| Frecuencia de muestreo | 30 MSPS | — |
| Number of Channels | 1 | 1 |
| Input Type | Differential / Single-Ended | Configurable: single-ended, single-ended with offset, or differential |
| Data Interface | Parallel | — |
| Architecture | Pipelined | Pipelined / multi-stage with digital error correction |
| Supply Voltage (Analog) | 3.3 V nominal | — |
| Supply Voltage (Digital) | 3.3 V nominal | — |
| Encapsulado / Carcasa | 28-TSSOP (0.173 in / 4.40 mm width) | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Temperatura de funcionamiento | 0C to +70C | 0 °C to +70 °C (C-grade commercial) |
| Packaging | Tube | — |
| Power Down Mode | Yes (dedicated PD pin) | — |
| Temperature Grade | Commercial | — |
| Estado RoHS | [DATA_NEEDED: rohs status] | Compliant |
| Conversion Time | 0.033 us (typical at 30 MSPS) | — |
| Sample Rate | — | 30 MSPS |
| Supply Voltage (AVDD) | — | 3.3 V (single supply) |
| Analog Input Bandwidth | — | [DATA_NEEDED: analog input bandwidth MHz] |
| SNR | — | [DATA_NEEDED: SNR dBFS at fIN] |
| SFDR | — | [DATA_NEEDED: SFDR dBc at fIN] |
| INL | — | [DATA_NEEDED: INL LSB] |
| DNL | — | [DATA_NEEDED: DNL LSB] |
| Power Dissipation | — | <250 mW at 30 MSPS (typical) |
| Power-Down Mode | — | Yes (hardware PD pin) |
| Digital Output | — | CMOS, parallel 12-bit |
| Encapsulado | — | 28-pin SOIC (DW), 7.50 mm body width, tape and reel |
| Nivel MSL | — | [DATA_NEEDED: MSL level] |
| Reference | — | Internal (external reference option) |