UCC21530DWKR vs UCC21530QDWKRQ1 Comparación
Comparación detallada lado a lado de UCC21530DWKR por Texas Instruments y UCC21530QDWKRQ1 por Texas Instruments. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Texas Instruments
UCC21530QDWKRQ1 - 4A/6A 5.7kVrms Isolated Gate Driver | TI
UCC21530QDWKRQ1 ✓ ActivoComparación de especificaciones
| Parámetro | UCC21530DWKR | UCC21530QDWKRQ1 |
|---|---|---|
| Marca | Texas Instruments | Texas Instruments |
| Categoría | Power MOSFET Drivers | Power MOSFET Drivers |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $1,95 | $1,07 |
| Driver Configuration | Half-Bridge (dual independent outputs) | — |
| Number of Channels | 2 | 2 (high-side / low-side) |
| Peak Source Current | 4 A | 4 A |
| Peak Sink Current | 6 A | 6 A |
| Isolation Voltage (RMS) | 5.7 kVRMS (reinforced, per UL 1577) | 5.7 kVRMS |
| Common-Mode Transient Immunity (CMTI) | >=125 V/ns (minimum) | 100 V/ns (minimum) |
| Channel-to-Channel Spacing | 3.3 mm | 3.3 mm (minimum) |
| Maximum Switching Frequency | 5 MHz | — |
| VDD Supply Range (logic side) | 3 V to 5.5 V | — |
| VDDA / VDDB Range (drive side) | 8 V to 18 V (up to 25 V per TI part details) | — |
| Propagation Delay | [DATA_NEEDED: propagation delay in ns] | — |
| Dead-Time Control | Programmable via DT pin resistor | — |
| Patilla de habilitación | Yes (EN, active-high; pulls LOW to disable both outputs) | Yes (active-low) |
| Input Logic Compatibility | CMOS / TTL | — |
| Rango de temperatura de funcionamiento | -40C to +125C | -40C to +125C |
| Encapsulado | 14-SOIC (DWK) with 3.3 mm channel spacing | 14-pin SOIC (DWK wide-body) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Approximate Datasheet Length | 47 pages (per third-party datasheet archive) | — |
| Estado RoHS | Compliant | Compliant |
| Función | — | Isolated dual-channel gate driver |
| Creepage / Clearance | — | 8.5 mm (DWK wide-body) |
| VDD/VDDA Supply Range | — | 18 V to 25 V (3 V to 18 V on logic side per datasheet) |
| Propagation Delay (Typical) | — | 33 ns |
| Maximum Operating Frequency | — | 5 MHz |
| Programmable Deadtime | — | Yes (DT pin) |
| Nivel MSL | — | 2 |
| AEC-Q100 Qualification | — | Qualified |
| Logic Input Compatibility | — | CMOS / TTL |