XC3090L-8PC84BKJ vs XC3090L-125PC84C Comparación
Comparación detallada lado a lado de XC3090L-8PC84BKJ por Xilinx y XC3090L-125PC84C por Xilinx. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | XC3090L-8PC84BKJ | XC3090L-125PC84C |
|---|---|---|
| Marca | Xilinx | Xilinx |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $19,20 | $64,00 |
| Family | XC3000L Low-Voltage Logic Cell Array | — |
| Logic Cells | 320 | — |
| Usable Gates | 6,000 | — |
| Configuration Memory | 64,160 bits | — |
| Maximum User I/O | 144 | — |
| Supply Voltage (Vcc) | 3.0 V to 3.6 V (low-voltage) | — |
| Speed Grade | -8 (approx. 70 MHz toggle) | — |
| Process Technology | 5 ns CMOS SRAM | CMOS, SRAM-based |
| Configuration Method | Serial/parallel SRAM, in-system reconfigurable | — |
| Boundary Scan | IEEE 1149.1 (JTAG) compliant | — |
| Encapsulado | 84-pin PLCC (J-Lead), windowed ceramic (BKJ) | 84-pin PLCC (J-lead, package code QCCJ) |
| Temperatura de funcionamiento | 0C to +70C (commercial, C suffix) | Commercial (0C to +70C) - exact grade [DATA_NEEDED: temperature grade] |
| Tipo de montaje | Through-hole (PLCC socket) | Surface Mount |
| Nivel MSL | [DATA_NEEDED: MSL rating] | — |
| Estado RoHS | unknown - legacy windowed ceramic package | [DATA_NEEDED: RoHS compliance] |
| Configuration Pins | M0, M1, M2 mode-select + DIN, DOUT, CCLK, INIT | — |
| Manufacturer | — | Xilinx |
| Series | — | XC3000L |
| Product Type | — | Field Programmable Gate Array (FPGA) |
| Logic Family | — | XC3000L Low-Voltage Logic Cell Array |
| Configurable Logic Blocks (CLBs) | — | 320 |
| Equivalent Gates | — | ~5,000 |
| Flip-Flops | — | 928 |
| Maximum Toggle Frequency | — | 125 MHz |
| Supply Voltage (VCC) | — | 3.0 V to 3.6 V (typical 3.3 V) |
| Terminal Form | — | J-BEND (J-lead) |
| Configuration Interface | — | Serial/parallel mode, JTAG (IEEE 1149.1) |