XC3090L-8PC84C vs XC3090LTM-8PC84C Comparación
Comparación detallada lado a lado de XC3090L-8PC84C por Xilinx y XC3090LTM-8PC84C por Xilinx. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | XC3090L-8PC84C | XC3090LTM-8PC84C |
|---|---|---|
| Marca | Xilinx | Xilinx |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $24,95 | $43,25 |
| Product Type | Field Programmable Gate Array (FPGA) | — |
| Series | XC3000A/L | — |
| Gates (Usable) | 6,000 | — |
| Logic Cells (CLBs) | 320 | — |
| Configuration Memory | 64,160 bits | 64,160 bits (distributed SRAM) |
| User I/O Pins | 70 | — |
| Maximum Toggle Frequency | 80 MHz | [DATA_NEEDED: specific fmax value] |
| Tensión de alimentación | 3.3 V (L variant) | — |
| Speed Grade | -8 | -8 (per suffix; see device decoder) |
| Operating Temperature Grade | Commercial (C) | — |
| Package Type | 84-pin PLCC (J-lead) | — |
| Tipo de montaje | Surface Mount / Socket | Surface Mount (PLCC socket-compatible) |
| Boundary Scan | JTAG IEEE 1149.1 | — |
| Configuration Mode | Serial / Parallel / Boundary-Scan | — |
| Lead-Free / RoHS | [DATA_NEEDED: RoHS status for legacy PLCC] | — |
| Family | — | XC3000L Low Voltage Logic Cell Array |
| Logic Cells / Gates | — | ~6,000 usable gates |
| Configurable Logic Blocks (CLBs) | — | 320 |
| Configuration Method | — | External EEPROM/EPROM/ROM/master/microprocessor mode |
| Core Supply Voltage | — | 3.0 V to 3.6 V (3.3 V typical) |
| Process Technology | — | 0.8 um CMOS SRAM-based |
| Encapsulado | — | 84-Pin Plastic Leaded Chip Carrier (PLCC, J-Lead) |
| Recuento de pines | — | 84 |
| Temperatura de funcionamiento | — | -40 C to +85 C (industrial, TM suffix typically commercial/industrial) |
| Logic Block Delays | — | [DATA_NEEDED: typical TBU/TPIO delay] |
| I/O Standard Support | — | TTL/CMOS 3.3 V (5 V tolerant with restrictions) |
| Estado RoHS | — | unknown |
| Lead-Free | — | unknown |
| Programming Toolchain | — | XACT / Foundation (legacy, EOL software) |