XC6SLX9-2TQG144I vs XC6SLX9-3TQG144C Comparación
Comparación detallada lado a lado de XC6SLX9-2TQG144I por AMD y XC6SLX9-3TQG144C por AMD. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | XC6SLX9-2TQG144I | XC6SLX9-3TQG144C |
|---|---|---|
| Marca | AMD | AMD |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Unknown |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $16,20 | $23,42 |
| Family | Spartan-6 LX | — |
| Logic Cells | 9,152 | 9,152 |
| Slices / ALMs | 1,430 ALMs (715 CLBs) | — |
| Block RAM | 576 Kbits (72 x 18 Kb) | — |
| DSP Slices | 16 (DSP48A1) | — |
| Maximum User I/O | 102 | — |
| Encapsulado | 144-pin TQFP (TQG144), 20 x 20 mm, 0.5 mm pitch | 144-LQFP |
| Speed Grade | -2 (mid-range) | -3 |
| Temperatura de funcionamiento | -40C to +100C (Industrial) | 0 to 85 C |
| Core Voltage (VCCINT) | 1.2 V | — |
| I/O Bank Voltage (VCCO) | 1.2 V to 3.3 V | — |
| Process Technology | 45 nm low-power CMOS (9-metal copper) | 45 nm low-power copper |
| Memory Interfaces | DDR, DDR2, DDR3, LPDDR (via Memory Controller Block) | — |
| Clock Management | DCM + PLL per tile | — |
| Tipo de montaje | Surface Mount | — |
| Nivel MSL | 3 (per JEDEC J-STD-020) | — |
| Estado RoHS | RoHS Compliant (Lead Free) | RoHS Compliant |
| Device Type | — | Spartan-6 LX FPGA |
| User I/O | — | 102 |
| Embedded Memory | — | 589,824 bits |
| Package Pin Count | — | 144 pins |
| Internal Frequency | — | 667 MHz |
| Lead-Free Status | — | Lead Free |
| FPGA Architecture | — | Spartan-6 LX |
| Programmability | — | Field-programmable logic |
| DigiKey Availability Statement | — | Buy now, ships today |
| Datasheet Availability | — | Manufacturer and distributor datasheet pages available |