XC9572-15PC44C vs XC9572-15PC44I Comparación
Comparación detallada lado a lado de XC9572-15PC44C por AMD y XC9572-15PC44I por Xilinx. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | XC9572-15PC44C | XC9572-15PC44I |
|---|---|---|
| Marca | AMD | Xilinx |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Fin de vida | Fin de vida |
| Device Type | In-system programmable complex programmable logic device | In-system programmable CPLD |
| Macrocell Count | 72 macrocells | 72 macrocells |
| Equivalent Gate Count | 1,600 gates | — |
| User I/O Count | 34 I/O pins | — |
| Logic Element Blocks | 4 blocks | — |
| Maximum Propagation Delay | 15 ns | — |
| Internal Supply Voltage Range | 4.75 V to 5.25 V | — |
| Nominal Supply Voltage | 5 V | — |
| Process Technology | 0.5 um Advanced CMOS | — |
| Configuration Technology | 5 V FastFLASH | 5 V Fast FLASH |
| Programming Type | In-system programmable | — |
| Program and Erase Endurance | At least 10,000 cycles | — |
| Encapsulado | 44-pin PLCC with J-lead terminals | 44-LCC J-lead (PLCC), square |
| Tipo de montaje | Surface mount | — |
| Lead-Free Status | Contains lead | [DATA_NEEDED: lead-free status] |
| Estado RoHS | RoHS non-compliant | [DATA_NEEDED: RoHS compliance status] |
| Rango de temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | — |
| Architecture | — | Advanced CMOS 5 V Fast FLASH |
| Propagation Delay | — | 15 ns speed grade |
| Family Pin-to-Pin Logic Delay | — | 5 ns |
| Family Maximum Counting Frequency | — | 125 MHz |
| I/O Line Count | — | 34 I/O |
| Maximum Supply Voltage | — | 5.5 V |
| Programming Support | — | In-system programming and parallel programming of multiple XC9500 devices |
| Temperature Grade | — | Industrial |
| Package Code | — | QCCJ |
| Terminal Count | — | 44 terminals |
| Terminal Form | — | J-bend |
| Transient Pin Overshoot | — | Up to +7.0 V for less than 10 ns with forcing current limited to 200 mA |
| Transient Pin Undershoot | — | Down to -2.0 V for less than 10 ns with forcing current limited to 200 mA |
| Maximum DC Undershoot Below Ground | — | Limited to either 0.5 V or 10 mA, whichever is easier to achieve |
| External I/O Voltage Limit | — | May not exceed VCCINT by more than 4.0 V |
| REACH Status | — | [DATA_NEEDED: REACH compliance status] |
| AEC-Q100 Qualification | — | [DATA_NEEDED: AEC-Q100 qualification status] |