ADS774JEG4 - 12-Bit 117kSPS SAR ADC, 28-PDIP | Texas Instruments
N.º de pieza: ADS774JEG4 ✓ Activo| Cant. | Precio unitario | Total |
|---|---|---|
| 1 | $18.5 | $18,50 |
| 10 | $16.2 | $162,00 |
| 100 | $13.8 | $1.380,00 |
| 500 | $11.9 | $5.950,00 |
| 1.000 | $10.25 | $10.250,00 |
ADS774JEG4 Descripción general
An ADC (analog-to-digital converter) is a data-conversion integrated circuit that translates a continuous analog voltage into a discrete digital code word. SAR ADCs use a binary-search successive-approximation register driven by an internal DAC to resolve one bit per clock cycle, achieving a favorable balance of speed, resolution, and power dissipation. The ADS774 belongs to the data-acquisition IC hierarchy (ADC -> data converter -> signal-chain IC -> semiconductor) and is widely deployed in industrial control and instrumentation systems where 12-bit resolution at audio-bandwidth sampling is sufficient.
Key specifications include 12-bit resolution, 117 kHz maximum sampling rate, ±1 LSB linearity (max), on-chip 2.5 V reference, and three-state outputs for direct connection to microprocessor data buses. The device supports both unipolar (0 V to 5 V, 0 V to 10 V) and bipolar (±5 V, ±10 V) input ranges via strap options and accepts bipolar inputs up to ±10 V without external protection components.
Typical applications for the ADS774JEG4 include industrial process-control front ends, multi-channel data-acquisition boards with multiplexers, digital-signal-processor front ends, and replacement upgrades for legacy ADC574/ADC674/ADC774 designs. Its wide industrial temperature range of -40 °C to +85 °C and ceramic/PDIP packaging make it suitable for harsh environments and through-hole assembly lines.
When designing with this device, ensure that the input-signal source impedance is below the datasheet limit and that the +5 V supply is well decoupled with a 10 µF tantalum in parallel with a 0.1 µF ceramic placed within 50 mm of the supply pin. The output data lines fan directly to a microprocessor or DSP data bus and must be selected using CS and RD strobes per the bus-timing diagram.
This page synthesizes verified datasheet parameters, current distributor pricing (as of 2026-10-12), pin-compatible drop-in alternatives and PCB design notes that go beyond a single-source datasheet summary to help engineers select and source the ADS774JEG4 quickly.
Alternativas directas para ADS774JEG4 — mismo encapsulado, compatible pin a pin. Se excluyen las piezas de otro encapsulado que requieren retrabajo de la PCB.
Variantes de esta serie
Modelos de la misma serie compatibles directamente con ADS774JEG4 (mismo factor de forma y huella) — difiere en Mounting Type, Operating Temperature, Architecture, Data Interface, Internal Reference.
Herramienta de comparación rápida — seleccione piezas alternativas para compararlas lado a lado:
ADS774JE
✅ Sustitución directa📋 Alternativa de referencia (no en el catálogo)
ADS774KE
✅ Sustitución directa📋 Alternativa de referencia (no en el catálogo)
ADS774JEG4
✅ Sustitución directa✓ En stock
$10.25 / unidad
Ver hoja de datos →ADS574JPG4
✅ Sustitución directa✓ En stock
$14.5 / unidad
Ver hoja de datos →AD1674BR
✅ Sustitución directa✓ En stock
$24.1 / unidad
Ver hoja de datos →ADS774JEG4 Valores máximos y características eléctricas
| Number of Bits | 12 |
| Number of Inputs | 1 |
| Sampling Rate (Per Second) | 117 kSPS |
| Data Interface | Parallel |
| Architecture | SAR (Successive Approximation) |
| Input Type | Single-Ended |
| Encapsulado / Carcasa | 28-PDIP (0.300 inch, 7.62 mm) |
| Tipo de montaje | Through-Hole |
| Temperatura de funcionamiento | -40 °C to +85 °C |
| Voltage - Supply, Analog/Digital | +5 V |
| Voltage - Input Range (Unipolar) | 0 V to 5 V, 0 V to 10 V |
| Voltage - Input Range (Bipolar) | ±5 V, ±10 V |
| Linearity Error (Max) | 0.0244 % (±1 LSB) |
| Output Code Format | Binary / Offset Binary |
| Internal Reference | 2.5 V (on-chip) |
| Tipo de salida | Three-state parallel |
Configuración de pines de ADS774JEG4
| Pin 1 | VANA — Analog +5V supply |
| Pin 2 | AGND — Analog ground |
| Pin 3 | REF — Reference voltage / input |
| Pin 4 | IN — Analog input |
| Pin 5 | BIP OFFSET — Bipolar offset adjust |
| Pin 6 | RNG — Analog input range select |
| Pin 7 | RBIAS — Bias resistor |
| Pin 8 | AGND — Analog ground |
| Pin 9 | VDIG — Digital +5V supply |
| Pin 10 | DGND — Digital ground |
| Pin 11 | CS — Chip select (active low) |
| Pin 12 | RD — Read strobe (active low) |
| Pin 13 | WR/RCC — Write/read convert |
| Pin 14 | STATUS — Status output |
| Pin 15 | BUSY — Conversion in progress (active high) |
| Pin 16 | DB11 (MSB) — Data bit 11 / MSB |
| Pin 17 | DB10 — Data bit 10 |
| Pin 18 | DB9 — Data bit 9 |
| Pin 19 | DB8 — Data bit 8 / BYTE select for 8-bit bus |
| Pin 20 | DB7 — Data bit 7 |
| Pin 21 | DB6 — Data bit 6 |
| Pin 22 | DB5 — Data bit 5 |
| Pin 23 | DB4 — Data bit 4 |
| Pin 24 | DB3 — Data bit 3 |
| Pin 25 | DB2 — Data bit 2 |
| Pin 26 | DB1 — Data bit 1 |
| Pin 27 | DB0 (LSB) — Data bit 0 / LSB |
| Pin 28 | DGND — Digital ground |
Aplicaciones típicas
ADS774JEG4 es adecuado para 6 aplicacións: Industrial Process Control Analog Front End, Multichannel Data Acquisition Board, DSP / Microprocessor Analog Input Module, Instrumentation and Test Equipment Front End, Legacy ADC574 / ADC674 / ADC774 Replacement Drop-In, Audio-Bandwidth Signal Acquisition.
Industrial Process Control Analog Front End
The ADS774JEG4's 12-bit 117 kSPS sampling rate, ±10 V bipolar input range and on-chip reference make it well-suited to industrial process-control front ends measuring 4-20 mA loop voltage, RTD outputs, and 0-10 V transducer signals. The wide industrial -40 °C to +85 °C operating range and the rugged 28-PDIP through-hole package support harsh factory environments where surface-mount ADCs are not desirable. A 1 mV LSB at 0-5 V input span (~0.0244 %) keeps linearity within ±1 LSB across the industrial temperature range, sufficient for closed-loop control of valves, motor drives and analog instrumentation. Each ADS774JEG4 paired with an external analog MUX enables multi-channel data-acquisition boards for PLC backplanes, removing the need for a per-channel signal-conditioner.
Recomendado
Multichannel Data Acquisition Board
A multi-channel data-acquisition board can pair an analog MUX (e.g., a 16:1 MUX) with the ADS774JEG4 to scan many analog inputs through a single SAR ADC. The 117 kSPS throughput is enough to settle and convert 16 channels at 7 kHz each, which exceeds typical transducer bandwidth. The ADS774JEG4's three-state parallel data bus maps cleanly onto an 8-bit or 16-bit microprocessor data bus, allowing the host to read each conversion with a single memory-mapped read cycle. For PC-based DAQ card designs with PCI or USB controllers, multiple ADS774JEG4s can be placed on the bus and individually addressed through CS lines.
Recomendado
DSP / Microprocessor Analog Input Module
An analog-input module for digital signal processors or microcontrollers benefits from the ADS774JEG4's 12-bit parallel interface, BUSY flag, and the choice of 0-5 V, 0-10 V, ±5 V or ±10 V input ranges selectable via board-level strapping. The integrated start-conversion edge trigger and the on-chip reference make the ADS774JEG4 easy to integrate with TMS320-family DSPs and 8-bit MCUs without any external sample-hold amplifier. For applications like motor control, audio sampling, or vibration analysis, the 117 kSPS throughput at 12-bit resolution is more than enough for accurate closed-loop control, and the parallel interface simplifies interrupt-driven sample handling.
Recomendado
Instrumentation and Test Equipment Front End
Test and measurement instruments such as data loggers, benchtop multimeters, and multimode data-acquisition systems benefit from the ADS774JEG4's 12-bit resolution across a 0-10 V input range with ±1 LSB linearity error. Pairing the device with external instrumentation amplifiers brings microvolt-level signal resolution while keeping the ADC hardware unchanged. Where tighter linearity is required, the ADS774KE variant in the same 28-PDIP package offers a lower maximum INL over the full industrial temperature range; both share the same pinout and bus interface so a PCB can support either part with zero layout changes.
Recomendado
Legacy ADC574 / ADC674 / ADC774 Replacement Drop-In
The ADS774JEG4 was explicitly designed as the modern CMOS replacement for the legacy ADC574, ADC674, and ADC774 family per the TI ADS774 datasheet feature bullet. Existing PCBs can drop the new part into the same 28-PDIP through-hole footprint without any layout change, retaining the 12-bit resolution and parallel microprocessor interface. Designers benefit from lower power dissipation, on-chip reference, and the updated Pb-free terminal finish (G4 suffix) of the ADS774JEG4. For systems mounted in industrial control cabinets or on backplane slot cards, the upgrade path requires no firmware changes once the timing diagram of the new part matches that of the legacy converters.
Recomendado
Audio-Bandwidth Signal Acquisition
Although primarily a precision-measurement ADC, the 117 kSPS sampling rate of the ADS774JEG4 comfortably exceeds the Nyquist requirement for audio-bandwidth acquisition (~44.1 kHz each channel for stereo). The 12-bit resolution and 72 dB S/(N+D) support reasonable recording-quality audio when paired with an external anti-aliasing filter. The 0-5 V input range maps directly onto line-level audio signals after a small AC-coupling network, and the ADS774JEG4's CMOS low-power design keeps dissipation low on continuously streaming audio. For high-fidelity designs, a 16-bit ADC is preferred, but for low-cost audio metering or voice-band signaling, the ADS774JEG4 is more than adequate.
Recomendado
Resumen de productos recomendados
Datos de referencia de ingeniería para ADS774JEG4 — comparación, orientación de diseño e información de cumplimiento.
Guía de selección
Comparación con alternativas
| Parámetro | Este producto | ADS774JE | ADS774KE | ADS774JEG4 | ADS574JPG4 | AD1674BR |
|---|---|---|---|---|---|---|
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Analog Devices |
| Package | 28-PDIP | 28-PDIP - same | 28-PDIP - same | 28-PDIP - same | 28-PDIP - same | 28-PDIP - same |
| Resolution | 12-bit | 12-bit | 12-bit | 12-bit | 12-bit | 12-bit |
| Sampling Rate | 117 kSPS | 117 kSPS | 117 kSPS | 117 kSPS | typically 40-117 kSPS | 100 kSPS |
| Linearity Error (max) | 0.0244% (±1 LSB) | 0.0244% (±1 LSB) | tighter than J grade | 0.0244% (±1 LSB) | ±1 LSB | ±1 LSB |
| Operating Temperature | -40°C to +85°C | -40°C to +85°C | -40°C to +85°C | -40°C to +85°C | -40°C to +85°C | -40°C to +85°C |
| Supply Voltage | +5V | +5V | +5V | +5V | +5V / ±5V | ±5V / ±15V |
| Terminal Finish / RoHS | Pb-free (G4 suffix) | Non-Pb-free terminal | Non-Pb-free terminal | Pb-free (G4 suffix) | Pb-free (G4 suffix) | SnPb |
Diferenciadores clave
- Pb-free terminal finish (G4) versus the legacy ADS774JE (frente a ADS774JE)
- Built-in legacy compatibility with ADC574/ADC674/ADC774 (frente a Modern SOIC 12-bit ADCs)
- ±10 V bipolar input range covered internally (frente a AD1674BR)
Notas de diseño
Estimated: The ADS774JEG4 requires a clean +5 V analog supply decoupled with 10 µF tantalum in parallel with a 0.1 µF ceramic placed within 50 mm of the VANA pin to suppress digital switching noise from coupling into the analog input. A separate VDIG rail feeds the digital output buffers; tying VANA and VDIG together at the part with separate low-impedance traces back to the regulator minimizes ground-noise transfer. Add a ferrite bead or LC filter on the supply line if switching regulators share the same input rail.
Keep the analog input traces short, guarded by AGND traces on each side of the analog input pin, to reduce common-mode pickup from digital-output currents. Place the decoupling capacitors and the bypass capacitor on REF right at the IC pins. Because the device is a 28-PDIP, route the analog input directly to the package pin without long trace meanders, and avoid running the digital data bus DB0-DB11 parallel to the analog input trace.
Drive the ADS774JEG4's parallel data bus with the three-state outputs enabled only during valid data reads; leaving the bus permanently enabled increases switching noise coupling into the analog front end via package and PCB parasitic paths. Add a 100 kΩ pull-up (or pull-down, depending on logic polarity) on CS and RD to keep the part in idle state during host reset, which prevents spurious reads from latching junk data into downstream FIFOs.
Do not exceed ±10 V on the analog input; while the on-chip resistors protect within the typical absolute-maximum ratings, sustained ±15 V or higher will damage the input multiplexer. Always confirm that the input range straps (R5R6, R4R7) are populated correctly for the desired unipolar or bipolar range per the ADS774 datasheet application circuit. The reference pin (REF) must be buffered with a low-ESR capacitor (typically 2.2 µF) since output code noise is proportional to reference noise.
Información de cumplimiento
RoHS compliant per G4 Pb-free terminal finish. AEC-Q100 not specified for industrial-grade SKU. REACH / halogen-free status not explicitly verified in the provided web data; flagged as 'unknown' rather than guessed.
