ATSAMD21E18A-MU - 48MHz Cortex-M0+ MCU, 256KB Flash | Microchip
N.º de pieza: ATSAMD21E18A-MU ✓ Activo| Cant. | Precio unitario | Total |
|---|---|---|
| 1 | $4.12 | $4,12 |
| 10 | $3.71 | $37,10 |
| 100 | $3.32 | $332,00 |
| 500 | $2.93 | $1.465,00 |
| 1.000 | $2.58 | $2.580,00 |
| 3.000 | $2.27 | $6.810,00 |
ATSAMD21E18A-MU Descripción general
A microcontroller (MCU) is a single-chip computer that integrates a CPU core, memory, and programmable peripherals. The Cortex-M0+ is ARM's smallest and most energy-efficient application-class core, designed for deterministic embedded control with a Thumb-2 instruction subset. The SAM D21E sits inside the broader SAM family (SAMD20/SAMD21/SAMDA1) of Cortex-M0+ MCUs, bridging 8-bit AVR legacy designs with the ARM ecosystem. Positioned in the system hierarchy, an MCU sits below a microprocessor (MPU) but above bare-metal state machines, providing self-contained compute for IoT, sensor, and consumer products.
Key features include a 12-bit 350 ksps ADC, up to 20 SERCOM (serial communication) channels configurable as UART/SPI/I2C, a 10-bit DAC, two analog comparators, a full-speed USB 2.0 device/host with on-chip transceiver, a Real-Time Clock (RTC), and a 6-channel Event System for inter-peripheral signaling. Functional Safety (FuSa) variants add IEC 60730 Class B compliance, supporting home appliance and industrial safety certification paths. Capacitive touch support via the Peripheral Touch Controller (PTC) enables buttons, sliders, and wheels.
Architecturally, the SAM D21E uses a single-cycle I/O bus and an AHB-Lite/APB matrix that decouples DMA (24 channels) from CPU activity, allowing low-latency data movement between peripherals and SRAM. SleepWalking peripherals and six power domains (Battery Backup, Retention, Performance, DeepSleep, etc.) enable the chip to drop into Deep Sleep consuming roughly the microamp range while retaining RTC and RAM state, an essential trait for battery-powered IoT.
Typical applications include home automation nodes, consumer wearables, smart metering, industrial sensor hubs, USB HID peripherals, and capacitive touch human-machine interfaces. The 32-pin VQFN footprint suits space-constrained PCBs where 48- or 64-pin QFN variants would not fit.
When designing, reserve 4 KB of Flash for the NVM bootloader/DFU row used by the on-chip USB or UART bootloader, and place a 1 uF + 100 nF decoupling pair within 2 mm of VDD. This page synthesizes distributor pricing, drop-in cross-family alternatives, and practical layout notes that are not aggregated on a single manufacturer page.
Alternativas directas para ATSAMD21E18A-MU — mismo encapsulado, compatible pin a pin. Se excluyen las piezas de otro encapsulado que requieren retrabajo de la PCB.
Variantes de esta serie
Modelos de la misma serie compatibles directamente con ATSAMD21E18A-MU (mismo factor de forma y huella) — difiere en Package, SRAM, ADC, Operating Temperature, USB.
Herramienta de comparación rápida — seleccione piezas alternativas para compararlas lado a lado:
ATSAMD21E18A-MUT
✅ Sustitución directa📋 Alternativa de referencia (no en el catálogo)
ATSAMD21E17A-MU
✅ Sustitución directa✓ En stock
$2.18 / unidad
Ver hoja de datos →ATSAMD21E18A-MF
✅ Sustitución directa✓ En stock
$6.95 / unidad
Ver hoja de datos →ATSAMD21E15B-AU
✅ Sustitución directa ⚠️ Especificaciones sin verificar✓ En stock
$1.45 / unidad
Ver hoja de datos →ATSAMD20E18A-MU
✅ Sustitución directa✓ En stock
$2.75 / unidad
Ver hoja de datos →ATSAMD21E17A-MFT
✅ Sustitución directa ⚠️ Especificaciones sin verificar✓ En stock
$2.55 / unidad
Ver hoja de datos →ATSAMD21E18A-MU Valores máximos y características eléctricas
| Core | ARM Cortex-M0+ 32-bit |
| Family | SAM D21E (SAMD21E18A) |
| Functional Safety | FuSa (IEC 60730 Class B) variant |
| Max CPU Clock | 48 MHz |
| CoreMark | 2.46 CoreMark/MHz |
| Flash Memory | 256 KB |
| SRAM | 32 KB |
| Operating Voltage (VDD) | 1.6 V to 3.6 V |
| Encapsulado | 32-pin VQFN (5x5 mm) with EP |
| Recuento de pines | 32 |
| Tipo de montaje | Surface Mount |
| ADC | 12-bit, up to 20 channels, 350 ksps |
| DAC | 10-bit, 1 channel |
| Analog Comparators | 2 |
| SERCOM Channels | Up to 6 (UART/SPI/I2C configurable) |
| USB | USB 2.0 Full-Speed Device/Host with on-chip transceiver |
| PTC (Touch) | Up to 256 channels (Peripheral Touch Controller) |
| DMA Channels | 24 |
| Event System Channels | 12 |
| RTC | Yes, 32-bit RTC |
| Temperatura de funcionamiento | -40 C to +85 C (Industrial) |
| Estado RoHS | Compliant |
| Bootloader | On-chip ROM (UART/USB bootloader) |
Configuración de pines de ATSAMD21E18A-MU
| Pin 1 | PA00 — GPIO / SERCOM1[0] / ADC[0] (refer to datasheet Multiplexed Signals table) |
| Pin 2 | PA01 — GPIO / SERCOM1[1] / ADC[1] |
| Pin 3 | PA02 — GPIO / AIN[0] (Analog Comparator input) |
| Pin 4 | PA03 — GPIO / AIN[1] (Analog Comparator input) |
| Pin 5 | GND — Ground reference (separate analog/digital pads on die, bonded to single pin) |
| Pin 6 | VDD — Digital supply input, 1.6 V to 3.6 V |
| Pin 7 | PA04 — GPIO / VOUT (Voltage Regulator output for analog blocks) |
| Pin 8 | PA05 — GPIO / SERCOM0[1] / ADC[5] |
| Pin 9 | PA06 — GPIO / SERCOM0[2] / ADC[6] |
| Pin 10 | PA07 — GPIO / SERCOM0[3] / ADC[7] |
| Pin 11 | PA08 — GPIO / SERCOM2[0] / ADC[8] |
| Pin 12 | PA09 — GPIO / SERCOM2[1] / ADC[9] / USB SOF |
| Pin 13 | PA10 — GPIO / SERCOM2[2] / ADC[10] |
| Pin 14 | PA11 — GPIO / SERCOM2[3] / ADC[11] |
| Pin 15 | VBAT — Battery Backup supply for RTC and Backup domain |
| Pin 16 | PA12 — GPIO / SERCOM4[0] |
| Pin 17 | PA13 — GPIO / SERCOM4[1] |
| Pin 18 | PA14 — GPIO / SERCOM4[2] |
| Pin 19 | PA15 — GPIO / SERCOM4[3] |
| Pin 20 | PA16 — GPIO / SERCOM1[0] |
| Pin 21 | PA17 — GPIO / SERCOM1[1] |
| Pin 22 | PA18 — GPIO / SERCOM1[2] |
| Pin 23 | PA19 — GPIO / SERCOM1[3] |
| Pin 24 | PA20 — GPIO / SERCOM5[2] |
| Pin 25 | PA21 — GPIO / SERCOM5[3] |
| Pin 26 | PA22 — GPIO / SERCOM3[0] / USB D- |
| Pin 27 | PA23 — GPIO / SERCOM3[1] / USB D+ |
| Pin 28 | PA24 — GPIO / SERCOM3[2] / USB Host enable |
| Pin 29 | PA25 — GPIO / SERCOM3[3] |
| Pin 30 | PA27 — GPIO (bootloader entry / SWD) |
| Pin 31 | PA28 — Reset (active-low, internally pulled-up) |
| Pin 32 | PA30 — SWDCLK (Serial Wire Debug clock) |
| Pin 33 | PA31 — SWDIO (Serial Wire Debug data) |
| Pin EP | EP — Exposed thermal pad; solder to ground plane for thermal/electrical reference |
Aplicaciones típicas
ATSAMD21E18A-MU es adecuado para 6 aplicacións: Home Automation / Smart Home Hub, USB HID / Consumer Peripherals, Capacitive Touch HMI / Appliance Control Panels, Industrial Sensor Hubs / Metering, Wearable Fitness Bands / Consumer Wearables, Smart Metering / Wireless Sensor End-Nodes.
Home Automation / Smart Home Hub
The ATSAMD21E18A-MU fits home automation hubs because its 48 MHz Cortex-M0+ core plus 256 KB Flash can run Zigbee/Wi-Fi co-processor glue logic, capacitive touch keypads, and BLE provisioning flows. The integrated 12-bit 350 ksps ADC reads thermistor or LDR sensors for HVAC control, while 6 SERCOM channels expose UART/SPI/I2C to radios, EEPROMS, and display drivers. The FuSa variant supports IEC 60730 Class B software self-test required by EU appliance safety standards. With Deep Sleep drawing a few microamps and RTC retained on VBAT, the MCU sustains years of battery life in wireless sensor end-nodes, justifying its placement over smaller 8-bit AVR parts that lack USB and touch.
Recomendado
USB HID / Consumer Peripherals
The ATSAMD21E18A-MU's integrated USB 2.0 Full-Speed device controller with on-chip transceiver removes the need for an external PHY, enabling compact USB keyboards, mice, and HID game controllers. The 256 KB Flash stores USB HID report descriptors, macro layers, and OTA firmware updates delivered via the on-chip USB DFU bootloader. Six SERCOM channels can drive RGB LED matrices, mechanical key switches, or external SPI Flash for profile storage. Compared to 8-bit AVR + FTDI bridges, the single-chip design saves BOM cost, PCB area, and USB enumeration latency, while the Cortex-M0+ core handles USB polling at full speed without CPU overload.
Recomendado
Capacitive Touch HMI / Appliance Control Panels
The ATSAMD21E18A-MU's Peripheral Touch Controller (PTC) supports up to 256 channels, enabling robust capacitive touch buttons, sliders, and wheels for kitchen appliances, washing-machine control panels, and HVAC thermostats. Hardware-based acquisition offloads the CPU, allowing the MCU to keep Deep Sleep current in the microamp range while still detecting proximity events through the Event System. The FuSa variant meets IEC 60730 Class B requirements for unattended appliance safety. Combined with the on-chip 12-bit ADC reading NTC temperature sensors and the integrated RTC scheduling timer-based cycles, the MCU replaces external touch ICs and 8-bit MCUs in appliance front panels.
Recomendado
Industrial Sensor Hubs / Metering
The ATSAMD21E18A-MU serves as a sensor-hub MCU in industrial metering thanks to its 12-bit 350 ksps ADC, 24 DMA channels, and 32 KB SRAM that buffers waveform captures without CPU intervention. The Event System lets DMA-fed ADC samples trigger SERCOM transmissions to upstream PLCs or LoRaWAN modems without waking the core, while the RTC timestamps each measurement for tamper detection. Industrial -40 C to +85 C operation covers factory-floor requirements, and the Cortex-M0+ deterministic interrupt latency suits IEC 61131-3 control loops. Compared to bare 8051 metering parts, the SAM D21E adds native USB for configuration and Modbus over USB, simplifying field commissioning.
Recomendado
Wearable Fitness Bands / Consumer Wearables
The ATSAMD21E18A-MU's Deep Sleep current in the microamp range, integrated 32-bit RTC, and 32 KB SRAM make it a fit for coin-cell-powered wearables such as fitness bands and BLE beacons. The 12-bit ADC reads optical heart-rate sensor photodiodes, while SERCOM channels drive SPI OLED displays and I2C accelerometers. The 256 KB Flash fits full BLE stack profiles (heart-rate, environmental sensing) and OTA upgrade payloads. Wake-on-interrupt from the Event System lets the CPU remain in sleep until an accelerometer threshold fires, extending coin-cell life from weeks to months. The 5x5 VQFN footprint fits sub-30 mm wearable PCBs that 48-pin QFN variants cannot.
Recomendado
Smart Metering / Wireless Sensor End-Nodes
The ATSAMD21E18A-MU integrates Cortex-M0+ compute, USB, RTC, and 24 DMA channels into a 32-pin VQFN, allowing designers to build wireless sensor end-nodes for water, gas, and electricity metering on a single IC. The 256 KB Flash holds LoRaWAN or Wireless M-Bus protocol stacks plus data logging firmware, while 32 KB SRAM buffers metering pulses between radio transmissions. Battery Backup mode keeps the RTC running from VBAT during primary-battery swap, and Event System channels timestamp consumption pulses to sub-millisecond accuracy. Compared to external RTC + 8-bit MCU designs, the SAM D21E reduces BOM and PCB area by 30-40%.
Recomendado
Resumen de productos recomendados
Datos de referencia de ingeniería para ATSAMD21E18A-MU — comparación, orientación de diseño e información de cumplimiento.
Guía de selección
Comparación con alternativas
| Parámetro | Este producto | ATSAMD21E18A-MUT | ATSAMD21E17A-MU | ATSAMD21E18A-MF | ATSAMD21E15B-AU | ATSAMD20E18A-MU |
|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | VQFN-32 (5x5 mm) with EP | VQFN-32 (5x5 mm) - same | VQFN-32 (5x5 mm) - same | VQFN-32 (5x5 mm) - same | VQFN-32 (5x5 mm) - same | VQFN-32 (5x5 mm) - same |
| Core | ARM Cortex-M0+ | ARM Cortex-M0+ | ARM Cortex-M0+ | ARM Cortex-M0+ | ARM Cortex-M0+ | ARM Cortex-M0+ |
| Max CPU Clock | 48 MHz | 48 MHz | 48 MHz | 48 MHz | 48 MHz | 48 MHz |
| Flash Memory | 256 KB | 256 KB | 128 KB | 256 KB | 32 KB | 256 KB |
| SRAM | 32 KB | 32 KB | 16 KB | 32 KB | 4 KB | 32 KB |
| USB | USB FS Device/Host (integrated) | USB FS Device/Host | USB FS Device/Host | USB FS Device/Host | USB FS Device/Host | No USB peripheral |
| Operating Voltage | 1.6 V to 3.6 V | 1.6 V to 3.6 V | 1.6 V to 3.6 V | 1.6 V to 3.6 V | 1.6 V to 3.6 V | 1.6 V to 3.6 V |
| Functional Safety (FuSa) | Yes (IEC 60730 Class B) | Yes (IEC 60730 Class B) | Yes (IEC 60730 Class B) | Yes (IEC 60730 Class B) | Yes (IEC 60730 Class B) | No (standard part) |
Diferenciadores clave
- Integrated USB 2.0 Full-Speed with on-chip transceiver (frente a ATSAMD20E18A-MU)
- Higher Flash density with same footprint (frente a ATSAMD21E17A-MU)
- Full 32 KB SRAM retains during Retention Sleep (frente a ATSAMD21E15B-AU)
Notas de diseño
Place a 1 uF X7R ceramic decoupling capacitor plus a 100 nF X7R capacitor within 2 mm of the VDD pin. The exposed thermal pad (EP) must be soldered to a continuous ground plane sized at least 25 mm x 25 mm; an unconnected EP raises thermal resistance from approximately 30 C/W to over 80 C/W and degrades ADC accuracy by 1-2 LSBs due to ground bounce. For USB operation, ensure VDD is held between 3.0 V and 3.6 V and that the on-chip LDO driving VDDANA is decoupled with 1 uF + 100 nF. Estimated: thermal resistance values are datasheet typical figures for JEDEC EIA/JESD51 test board geometry.
Route the SWDIO and SWDCLK traces (PA30, PA31) as a matched pair to the debug header, keeping total trace length under 50 mm and avoiding vias. PA27 is the bootloader entry (BOOTPROT) pin and should be exposed as a test point or pull-down to allow re-flash via the on-chip USB DFU bootloader if firmware becomes corrupted. USB D+/D- traces (PA22/PA23) require 90-ohm differential impedance and 22-ohm series termination, with a maximum length of 50 mm and no stubs. Estimated: impedance values are derived from USB 2.0 Full-Speed specification, not a datasheet figure for this part.
Do not exceed the 3.6 V absolute maximum on VDD; the on-chip ADC inputs are not 5 V tolerant and will latch-up if a 5 V signal is applied directly. The NVMCTRL writes lock bit row at the top of Flash must be cleared with a chip erase before re-programming the bootloader - otherwise, an attempted OTA update silently fails with a programming error. SERCOM pads must be configured via PORT->PMUX and PORT->PINCFG before peripheral use; peripheral alternate-function assignment is not automatic on startup. PTC acquisition timing must be tuned with a low-pass filter on the touch lines; inadequate filtering causes false proximity triggers in high-noise EMC environments.
The Cortex-M0+ core uses a single AHB-Lite/APB matrix; high-frequency ADC sampling at 350 ksps in conjunction with DMA bursts can couple noise into the analog domain via VDDANA. Place a ferrite bead between VDD and VDDANA supply rails to isolate switching noise from the analog reference. The USB on-chip transceiver requires a 22-ohm series termination on each of D+/D- to match the 90-ohm differential impedance; omitting these resistors causes USB compliance test failures and high jitter at 12 Mbps. Estimated: ferrite bead impedance is not specified in the ATSAMD21E18A-MU datasheet; recommend 600-ohm at 100 MHz parts.
At 48 MHz CPU clock with all peripherals enabled and USB active, the ATSAMD21E18A-MU consumes approximately 11 mA, dissipating roughly 36 mW at 3.3 V. With a properly soldered 25 mm x 25 mm ground plane under the EP, the thermal resistance (theta_JA) is approximately 30 C/W, yielding a junction temperature rise of only 1 C above ambient. Without the EP soldered, junction temperature can rise 30-40 C above ambient, still within the -40 C to +85 C industrial window. For sealed enclosures with no airflow, derate peripheral activity to keep junction temperature below 90 C to leave margin. Estimated: power figures are typical datasheet numbers; thermal values assume a 4-layer JEDEC test PCB.
Información de cumplimiento
RoHS and REACH compliance per Microchip material declaration. AEC-Q100 not qualified - the part targets industrial/commercial, not automotive. For automotive, choose ATSAMD21E18A-MF (extended qualification) or contact Microchip for AEC-Q100 grade variants.
