CL10B475KQ8NQNC - 4.7µF 6.3V X7R 0603 MLCC | Samsung Electro-Mechanics
N.º de pieza: CL10B475KQ8NQNC ✓ Activo| Cant. | Precio unitario | Total |
|---|---|---|
| 1 | $0.11 | $0,11 |
| 10 | $0.089 | $0,89 |
| 100 | $0.062 | $6,20 |
| 500 | $0.048 | $24,00 |
| 1.000 | $0.038 | $38,00 |
| 4.000 | $0.029 | $116,00 |
CL10B475KQ8NQNC Descripción general
A ceramic capacitor is a passive two-terminal component that stores energy in an electric field formed by alternating layers of metal electrodes and a ceramic dielectric. The X7R dielectric is a 'stable' Class II formulation defined by EIA-198: capacitance variation of ±15% across the operating temperature range of −55 °C to +125 °C, with a maximum dissipation factor of 10% at 1 kHz/1 Vrms. Within the broader taxonomy, this device is a chip capacitor → MLCC → ceramic capacitor → capacitor → passive component. Sibling dielectrics include X5R (smaller temperature range, higher capacitance per volume) and C0G/NP0 (zero TC, lower capacitance density). X7R is the most common general-purpose choice for decoupling and bulk filtering in digital, analog, and power circuits.
Key features include 4.7 µF nominal capacitance in the compact 0603 footprint (unusually high capacitance density for this case size), ±10% capacitance tolerance (K code per EIA), 6.3 V rated DC working voltage, X7R temperature characteristic (±15% from −55 °C to +125 °C), and a paper + embossed plastic tape packaging format. The Ni-barrier tin finish supports lead-free reflow profiles up to 260 °C peak (per JEDEC J-STD-020). Because this part is a 2-terminal passive, there is no polarity, no enable pin, and no SOA curve.
From a technical-depth perspective, the X7R dielectric delivers high volumetric efficiency (typically 1–10 µF in 0603) at the cost of some voltage coefficient and aging. The 6.3 V rating provides minimal margin above common 3.3 V and 5 V rails — derate to ≤80% of rated voltage for long-term reliability when used near maximum temperature. The 0603 footprint is reflow-solder compatible and compatible with both Pb-free and SnPb profiles, making the part broadly drop-in across consumer, industrial, and telecom assemblies.
Typical applications include IC decoupling on 3.3 V / 5 V digital rails (microcontrollers, FPGAs, ASICs), bulk hold-up on low-voltage power rails, filter capacitor in audio and sensor signal chains, and bypass capacitor near DC-DC converter inputs. The 4.7 µF value is the workhorse bulk level for point-of-load decoupling of moderate-current digital devices.
When designing with this part, place the capacitor as close as possible to the IC supply pin to minimize parasitic inductance, and pair with a smaller 0.1 µF high-frequency bypass cap on the same rail for broadband decoupling. Be aware that X7R loses 30–60% of nominal capacitance under DC bias — verify effective capacitance at the working voltage, not at the 0-V small-signal spec.
This page synthesizes Samsung MLCC specification data, distributor pricing, drop-in cross-brand alternatives, and practical decoupling design notes not found on a single distributor product page.
Alternativas directas para CL10B475KQ8NQNC — mismo encapsulado, compatible pin a pin. Se excluyen las piezas de otro encapsulado que requieren retrabajo de la PCB.
Herramienta de comparación rápida — seleccione piezas alternativas para compararlas lado a lado:
CL10B475KP8NQNC
✅ Sustitución directa📋 Alternativa de referencia (no en el catálogo)
CL10B475KOQ8NQNC
✅ Sustitución directa ⚠️ Especificaciones sin verificar📋 Alternativa de referencia (no en el catálogo)
GRM188R70J475KE19D
✅ Sustitución directa📋 Alternativa de referencia (no en el catálogo)
CGA3E1X7R0J475K
✅ Sustitución directa📋 Alternativa de referencia (no en el catálogo)
CC0603KRX7R5BB475
✅ Sustitución directa📋 Alternativa de referencia (no en el catálogo)
AVMLC0603R475K6R3
✅ Sustitución directa ⚠️ Especificaciones sin verificar📋 Alternativa de referencia (no en el catálogo)
CL10B475KQ8NQNC Valores máximos y características eléctricas
| Capacitance | 4.7 µF |
| Capacitance Tolerance | ±10% (K code) |
| Rated Voltage (DC) | 6.3 V |
| Dielectric | X7R (EIA Class II) |
| Temperature Characteristic | ±15% over −55 °C to +125 °C |
| Case Size (Imperial) | 0603 |
| Case Size (Metric) | 1608 |
| Length | 1.60 ± 0.15 mm |
| Width | 0.80 ± 0.15 mm |
| Termination | Nickel barrier + Tin (Ni/Sn) |
| Tipo de montaje | Surface Mount (SMD) |
| Packaging | Paper / embossed plastic tape (T&R) |
| Temperatura de funcionamiento | −55 °C to +125 °C |
| Nivel MSL | 1 (per JEDEC J-STD-020) |
| Estado RoHS | Compliant |
| Series | CL (Samsung MLCC general purpose) |
Configuración de pines de CL10B475KQ8NQNC
| Pin 1 | Terminal 1 — Solder pad — one of two equivalent terminals; no polarity |
| Pin 2 | Terminal 2 — Solder pad — equivalent to Terminal 1; no polarity |
Aplicaciones típicas
CL10B475KQ8NQNC es adecuado para 7 aplicacións: Microcontroller / SoC Decoupling (3.3 V / 5 V rails), FPGA / ASIC Core and I/O Rail Bulk Filtering, DC-DC Converter Input / Output Bulk Capacitor, Audio Codec / DAC Power-Rail Bypass, USB / Connectivity Module Power Decoupling, Industrial Sensor Signal Conditioning, IoT / Wearable Device Power Management.
Microcontroller / SoC Decoupling (3.3 V / 5 V rails)
The CL10B475KQ8NQNC's 4.7 µF bulk value at 6.3 V rating is well-matched to point-of-load decoupling on common 3.3 V and 5 V microcontroller and SoC supply pins. X7R's ±15% capacitance stability across −55 °C to +125 °C ensures the bulk reservoir stays effective even in harsh thermal environments. Placed within 2–3 mm of the IC VDD pin in parallel with a 0.1 µF NP0/C0G HF bypass cap, this Samsung MLCC delivers broadband decoupling from DC to several hundred MHz. Designers should verify effective capacitance under DC bias — X7R typically loses 30–60% at 6.3 V applied — and pair with a higher-voltage part (e.g., CL10B475KOQ8NQNC at 16 V) if more stable C is required.
Recomendado
FPGA / ASIC Core and I/O Rail Bulk Filtering
Modern FPGAs and ASICs draw transient currents in the ampere range during logic switching; the CL10B475KQ8NQNC provides the local bulk reservoir on each core and I/O rail. The 0603 footprint fits the dense BGA breakout routing common to FPGAs like Xilinx 7-series or Intel Cyclone, and Samsung's Ni/Sn termination supports standard lead-free reflow at 260 °C peak. At 4.7 µF with 6.3 V rating, this part covers 1.0–3.3 V rails comfortably with appropriate derating. For high-current transients above 5 A, supplement with a polymer tantalum or multiple parallel MLCCs rather than scaling to a single larger cap.
Recomendado
DC-DC Converter Input / Output Bulk Capacitor
The CL10B475KQ8NQNC is widely used as the input bulk capacitor for low-current buck regulators and as the output filter capacitor for small LDO and buck converters operating on 3.3 V or 5 V rails. X7R's stability across temperature and low ESR (typically < 10 mΩ at 1 MHz for a 4.7 µF 0603) keeps converter ripple well-controlled. Samsung's high-volume CL-series manufacturing ensures consistent lot-to-lot performance. For switching nodes above 6.3 V, step up to the 16 V or 25 V CL-series variant — using CL10B475KQ8NQNC above its rated voltage risks dielectric breakdown and accelerated aging.
Recomendado
Audio Codec / DAC Power-Rail Bypass
Audio codecs and DACs require low-impedance power rails to suppress PSRR-induced noise in the audio band; the CL10B475KQ8NQNC serves as the bulk bypass on the AVDD/DVDD pins. While C0G/NP0 is theoretically quieter, the high capacitance density of X7R lets a single 0603 replace multiple smaller caps, simplifying layout. Combined with a 0.1 µF NP0 high-frequency cap on the same pin, the broadband decoupling suppresses both low-frequency ripple and switching-noise spurs. Place within 1–2 mm of each analog supply pin and route a wide, short trace to the cap pad to minimize parasitic inductance.
Recomendado
USB / Connectivity Module Power Decoupling
USB 2.0/3.0 transceivers, Bluetooth/WiFi modules, and Ethernet PHYs all require low-impedance 3.3 V or 5 V decoupling close to the transceiver IC. The CL10B475KQ8NQNC's 4.7 µF bulk value at 0603 size fits the small module footprints common to these devices. Samsung MLCCs are widely second-sourced and cross-compatible with Murata GRM188R70J475KE19D and TDK CGA3E1X7R0J475K, reducing single-source risk for production. The MSL-1 moisture rating and Ni/Sn termination support standard reflow profiles used in module manufacturing.
Recomendado
Industrial Sensor Signal Conditioning
Industrial analog sensors — RTD, thermocouple, strain-gauge, and 4–20 mA current loop front-ends — need clean ±5 V or 3.3 V rails for op-amp-based signal chains. The CL10B475KQ8NQNC provides bulk decoupling on the op-amp supply pins, complementing a smaller 0.1 µF NP0 cap on the same rail. The X7R dielectric's ±15% tolerance across −55 °C to +125 °C is well-suited to industrial temperature ranges, and the 0603 footprint is compatible with high-density sensor front-end PCBs. Verify effective C under DC bias at the actual supply voltage for precision analog stages.
Recomendado
IoT / Wearable Device Power Management
Battery-powered IoT nodes and wearables operate from 1.8 V, 3.3 V, or Li-ion-derived rails where the CL10B475KQ8NQNC serves as the bulk reservoir on each active rail. The 0603 size is the dominant case for wearable PCBs where board area is at a premium. Samsung's high-volume CL-series ensures stable supply, and the 6.3 V rating comfortably covers single-cell Li-ion (4.2 V max) and 3.3 V regulated rails. For lowest quiescent current, confirm leakage specification with the manufacturer — typical X7R 4.7 µF leakage is well under 1 µA at rated voltage.
Recomendado
Resumen de productos recomendados
Datos de referencia de ingeniería para CL10B475KQ8NQNC — comparación, orientación de diseño e información de cumplimiento.
Guía de selección
Comparación con alternativas
| Parámetro | Este producto | CL10B475KP8NQNC | GRM188R70J475KE19D | CGA3E1X7R0J475K | CC0603KRX7R5BB475 | AVMLC0603R475K6R3 |
|---|---|---|---|---|---|---|
| Brand | Samsung Electro-Mechanics | Samsung Electro-Mechanics | Murata Manufacturing | TDK | YAGEO | KYOCERA AVX |
| Package | 0603 (1608) — same | 0603 (1608) — same | 0603 (1608) — same | 0603 (1608) — same | 0603 (1608) — same | 0603 (1608) — same |
| Capacitance | 4.7 µF | 4.7 µF | 4.7 µF | 4.7 µF | 4.7 µF | 4.7 µF |
| Capacitance Tolerance | ±10% | ±10% | ±10% | ±10% | ±10% | ±10% |
| Rated Voltage | 6.3 V | 6.3 V | 6.3 V | 6.3 V | 6.3 V | 6.3 V |
| Dielectric | X7R | X5R | X7R | X7R | X7R | X7R |
| Temperature Range | −55 °C to +125 °C | −55 °C to +85 °C | −55 °C to +125 °C | −55 °C to +125 °C | −55 °C to +125 °C | −55 °C to +125 °C |
| Automotive Grade | No (commercial) | No (commercial) | No (commercial) | Yes (AEC-Q200, CGA series) | No (commercial) | No (commercial) |
Diferenciadores clave
- Samsung CL-series general-purpose pedigree (frente a Murata GRM188R70J475KE19D)
- Broader temperature range than X5R sibling (frente a CL10B475KP8NQNC (X5R))
- Commercial-grade vs automotive grade cross-brand option (frente a TDK CGA3E1X7R0J475K)
Notas de diseño
DC-bias derating is the most common X7R pitfall: a 6.3 V rated 4.7 µF MLCC like CL10B475KQ8NQNC can lose 30–60% of nominal capacitance at full-rated DC voltage. Always check the manufacturer's C-vs-V curve at the actual operating rail. For a 3.3 V rail on a 6.3 V part, expect ~70–80% retention; for a 5 V rail on the same part, expect ~50–60%. If effective C under bias is critical, uprate to a 16 V part such as CL10B475KOQ8NQNC.
Place the CL10B475KQ8NQNC within 2–3 mm of the IC supply pin and use short, wide traces (≥0.3 mm) to minimize parasitic inductance. Recommended 0603 land pattern is 1.8 × 0.95 mm pads with 0.7 mm spacing per IPC-7351 nominal density. Pair with a smaller 0.1 µF NP0/C0G bypass cap on the same pin for broadband decoupling from DC to several hundred MHz. Avoid routing noisy switching signals between the cap and IC pin.
The CL10B475KQ8NQNC is rated for −55 °C to +125 °C operation with X7R's ±15% capacitance variation across that range. For long-term reliability, derate to ≤80% of rated voltage and keep ambient temperature below 85 °C in enclosed housings. Below −10 °C, X7R's capacitance drops another 5–10% — for cold-environment precision analog, consider C0G/NP0 parts in a larger case. Solder profile per JEDEC J-STD-020 MSL-1 with peak ≤260 °C, 20–40 s above 217 °C.
Información de cumplimiento
RoHS compliant per Samsung MLCC specification sheet (AUG.27.2025). Lead-free Ni/Sn termination supports JEDEC J-STD-020 reflow. AEC-Q100/200 not qualified — for automotive, choose TDK CGA3E1X7R0J475K (AEC-Q200) or equivalent.
