CS5560-ISZ - 24-Bit 50kSps Delta-Sigma ADC | Cirrus Logic
N.º de pieza: CS5560-ISZ ✓ Activo| Cant. | Precio unitario | Total |
|---|---|---|
| 1 | $12.5 | $12,50 |
| 10 | $11.25 | $112,50 |
| 100 | $9.95 | $995,00 |
| 500 | $8.75 | $4.375,00 |
| 1.000 | $7.85 | $7.850,00 |
CS5560-ISZ Descripción general
An ADC (Analog-to-Digital Converter) is a semiconductor device that converts continuous analog voltage signals into discrete digital codes for processing by microcontrollers, DSPs, or FPGAs. Delta-sigma (Σ-Δ) ADCs use oversampling and noise-shaping techniques to achieve high resolution (16-24 bits) at the cost of lower conversion rates compared to SAR or pipeline architectures. They are categorized as data acquisition ICs within the broader signal chain IC family, sitting between analog sensors and digital processors.
Key features of the CS5560-ISZ include 24 bits no missing codes, signal-to-noise ratio optimized for precision measurement, linearity error of 0.0005%, conversion time of 20 µs that settles in a single conversion, and guaranteed monotonic operation across the full input range. The integrated input buffers simplify front-end signal conditioning by eliminating the need for external op-amp buffers when interfacing with high-impedance sensors or bridge circuits.
The device employs a multi-bit delta-sigma modulator followed by a digital decimation filter, achieving wide dynamic range while maintaining low total harmonic distortion. The single-cycle settling capability makes the CS5560 particularly well-suited for multiplexed channel scanning applications where the ADC must acquire new data rapidly after switching inputs. Internal calibration registers compensate for offset and gain errors at the factory.
Typical applications of the CS5560-ISZ include precision weighing scales and load cell digitizers, industrial process control transducers, medical instrumentation such as patient monitoring equipment, seismic and vibration data acquisition systems, and high-accuracy temperature or strain gauge measurement front-ends. The differential input architecture and integrated reference buffer make it ideal for bridge sensor signal chains where common-mode noise rejection is critical.
When designing with the CS5560-ISZ, ensure the analog and digital grounds are tied at a single point near the ADC, with separate ground planes for analog and digital returns to prevent digital switching noise from coupling into sensitive analog inputs. Use a low-noise voltage reference for VREF+ to maximize SNR, and place decoupling capacitors (typically 100 nF ceramic plus 10 µF tantalum) as close as possible to both VA and VD supply pins.
This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet. The CS5560-ISZ is currently in production with multiple distributors carrying stock, making it a reliable choice for new designs as well as legacy maintenance.
Alternativas directas para CS5560-ISZ — mismo encapsulado, compatible pin a pin. Se excluyen las piezas de otro encapsulado que requieren retrabajo de la PCB.
Variantes de esta serie
Modelos de la misma serie compatibles directamente con CS5560-ISZ (mismo factor de forma y huella) — difiere en Interface, Manufacturer, Package, Part Number, RoHS Status.
Herramienta de comparación rápida — seleccione piezas alternativas para compararlas lado a lado:
CS5560-ISZR
✅ Sustitución directa📋 Alternativa de referencia (no en el catálogo)
CS5561-ISZ
✅ Sustitución directa ⚠️ Especificaciones sin verificar✓ En stock
$10.4 / unidad
Ver hoja de datos →CS5560-ISZ Valores máximos y características eléctricas
| Manufacturer | Cirrus Logic Inc. |
| Part Number | CS5560-ISZ |
| Resolución | 24 bit |
| Number of Channels | 1 input |
| ADC Architecture | Sigma-Delta |
| Frecuencia de muestreo | 50 kSps (max) |
| Input Configuration | Fully differential |
| Conversion Time | 20 µs (single-cycle settling) |
| Linearity Error | 0.0005% |
| Missing Codes | None (24 bits guaranteed) |
| On-Chip Buffers | Yes (AIN and VREF+ high-impedance buffers) |
| Interfaz | 3/4-wire SPI-compatible serial |
| Tensión de alimentación | ±2.5 V or 5 V (single supply) |
| Reference Input | External, differential VREF+/VREF- |
| Encapsulado | 24-pin SSOP |
| Temperatura de funcionamiento | -40°C to +85°C (industrial) |
| Tipo de montaje | Surface Mount |
| Estado RoHS | Compliant |
Configuración de pines de CS5560-ISZ
| Pin 1 | AIN+ — Positive differential analog input |
| Pin 2 | AIN- — Negative differential analog input |
| Pin 3 | VREF+ — Positive reference input (buffered) |
| Pin 4 | VREF- — Negative reference input |
| Pin 5 | VA — Analog supply voltage |
| Pin 6 | GND — Ground |
| Pin 7 | VA — Analog supply voltage |
| Pin 8 | GND — Ground |
| Pin 9 | NC — Not connected |
| Pin 10 | NC — Not connected |
| Pin 11 | NC — Not connected |
| Pin 12 | NC — Not connected |
| Pin 13 | VD — Digital supply voltage |
| Pin 14 | GND — Ground |
| Pin 15 | CS — Chip select (active low) |
| Pin 16 | SCLK — Serial clock input |
| Pin 17 | SDATA — Serial data output |
| Pin 18 | DRDY — Data ready output |
| Pin 19 | NC — Not connected |
| Pin 20 | NC — Not connected |
| Pin 21 | NC — Not connected |
| Pin 22 | NC — Not connected |
| Pin 23 | NC — Not connected |
| Pin 24 | NC — Not connected |
Aplicaciones típicas
CS5560-ISZ es adecuado para 6 aplicacións: Precision Weighing Scales, Industrial Process Control, Medical Instrumentation, Seismic and Vibration Data Acquisition, Strain Gauge and Bridge Sensor Signal Chains, Temperature Measurement with RTD/Thermocouple.
Precision Weighing Scales
The CS5560-ISZ is ideal for precision weighing scales and load cell digitizers where 24-bit resolution captures minute weight changes. Its integrated AIN and VREF+ input buffers directly interface with bridge-type load cells without external op-amps, reducing BOM and PCB area. The 50 kSps throughput supports fast settling for commercial scale calibration, while 0.0005% linearity error ensures accuracy across the full weighing range. Single-cycle 20 µs settling enables rapid multiplexer channel switching for multi-load-cell platforms.
Recomendado
Industrial Process Control
In industrial process control systems the CS5560-ISZ digitizes transducer signals from pressure transmitters, flow meters, and level sensors. The fully differential input rejects common-mode noise from motor drives and switching power supplies common on factory floors. Wide dynamic range from the 24-bit sigma-delta architecture detects both small process variations and large setpoint changes without gain switching. The 3/4-wire SPI interface connects directly to PLCs and industrial microcontrollers.
Recomendado
Medical Instrumentation
The CS5560-ISZ serves medical instrumentation front-ends including ECG, EEG, and patient monitoring devices where low-frequency biosignals require high resolution. Its 24-bit no-missing-codes performance captures microvolt-level cardiac signals while the differential input rejects 50/60 Hz power-line interference. Integrated input buffers simplify IEC 60601-1 compliant isolated front-end designs. The wide supply range (±2.5 V or 5 V) accommodates battery-powered portable medical devices.
Recomendado
Seismic and Vibration Data Acquisition
Geophysical exploration systems and structural vibration monitors use the CS5560-ISZ to digitize signals from geophones, accelerometers, and piezo sensors. Its 24-bit dynamic range captures both strong seismic events and weak ambient vibrations in a single acquisition pass without range switching. The 50 kSps sampling rate accommodates vibration analysis up to 20 kHz bandwidth per Nyquist criterion. Differential inputs reject ground-loop noise in long cable runs from remote sensors.
Recomendado
Strain Gauge and Bridge Sensor Signal Chains
The CS5560-ISZ's differential input and integrated reference buffer are purpose-built for Wheatstone bridge sensors including strain gauges, pressure transducers, and force sensors. The VREF+ high-impedance buffer accepts low-noise external references essential for ratiometric measurements, compensating for sensor excitation drift. 0.0005% linearity error maintains gauge accuracy across the full deflection range. SPI output simplifies connection to industrial IoT edge nodes.
Recomendado
Temperature Measurement with RTD/Thermocouple
Precision temperature measurement systems using PT100/PT1000 RTDs or K/J-type thermocouples benefit from the CS5560-ISZ's 24-bit resolution to resolve sub-0.01°C changes. The differential input rejects thermocouple loop common-mode voltages when used with isolated front-ends. Integrated input buffers accept high-impedance thermocouple signals directly without cold-junction compensation amplifier stages. The 0.0005% linearity error maintains NIST-traceable calibration accuracy in laboratory and industrial process environments.
Recomendado
Resumen de productos recomendados
Datos de referencia de ingeniería para CS5560-ISZ — comparación, orientación de diseño e información de cumplimiento.
Guía de selección
Comparación con alternativas
| Parámetro | Este producto | CS5560-ISZR | CS5561-ISZ | ADS1256IDBR |
|---|---|---|---|---|
| Brand | Cirrus Logic | Cirrus Logic | Cirrus Logic | Texas Instruments |
| Package | 24-SSOP | 24-SSOP - same | 24-SSOP - same | 28-SSOP - DIFFERENT |
| Resolution | 24 bit | 24 bit | 24 bit | 24 bit |
| Sampling Rate | 50 kSps | 50 kSps | 40 kSps | 30 kSps |
| Number of Channels | 1 differential | 1 differential | 1 differential | 8 differential/16 single-ended |
| Architecture | Sigma-Delta | Sigma-Delta | Sigma-Delta | Sigma-Delta |
| Input Buffers | Integrated (AIN, VREF+) | Integrated | Integrated | External required |
| Interface | 3/4-wire SPI | 3/4-wire SPI | 3/4-wire SPI | SPI |
Diferenciadores clave
- Integrated input buffers for both AIN and VREF+ (frente a ADS1256IDBR)
- Higher sampling rate (50 kSps vs 30 kSps) (frente a ADS1256IDBR)
- Single-cycle 20µs settling (frente a CS5561-ISZ)
Notas de diseño
Use separate analog and digital ground planes tied at a single point near the CS5560-ISZ GND pin. Route AIN+/AIN- as a differential pair with matched impedance, keeping traces short and away from switching nodes (DC-DC converters, clock signals). Place 100 nF ceramic + 10 µF tantalum decoupling capacitors within 5 mm of VA and VD pins. Avoid running digital signals (SCLK, SDATA) directly above analog input traces to prevent capacitive coupling.
Do NOT connect VREF- to GND when using single-ended references; the CS5560 requires true differential reference for ratiometric measurements. The integrated VREF+ buffer has limited drive capability — use an external low-noise reference like ADR5044 or ADR01 rather than the analog supply. NC pins (9-12, 19-24) MUST remain floating per datasheet — do NOT connect them to GND or supply as this can cause internal bias errors and degrade linearity.
For optimum SNR with the CS5560-ISZ, place a simple RC anti-aliasing filter (typically 100 Ω + 1 nF, fc ≈ 1.6 MHz) right at the AIN+/AIN- pins. The internal buffers handle the capacitive load well. When using long sensor cables (>100 mm), add ESD protection diodes (such as PESD5V0L1BA) at the connector to prevent transient damage during hot-plug events.
Información de cumplimiento
RoHS compliant per Cirrus Logic product page. Industrial temperature range -40°C to +85°C. Not AEC-Q100 qualified for automotive applications.
