DG403DY+ - Dual High-Speed 45Ω SPDT Switch | Maxim
N.º de pieza: DG403DY+ ✓ ActivoDG403DY+ Descripción general
An analog switch is a semiconductor device that routes analog signals between terminals under digital control. Within the interface-IC hierarchy, the DG403DY+ belongs to the CMOS analog-switch family and supports bidirectional signal conduction with TTL- and CMOS-compatible control inputs. Unlike a mechanical relay, it changes connection state electronically with no mechanical movement, allowing faster operation and compact implementation.
The DG403DY+ combines a typical on-resistance of 20Ω with a maximum specified resistance of 45Ω. Manufacturer specifications also guarantee on-resistance matching within 2Ω and on-resistance flatness within 3Ω over the signal range. Its switching time is below 150ns, while charge injection is limited to 15pC maximum. These specifications improve signal integrity by reducing amplitude error, timing uncertainty, and unwanted switching transients.
The dual SPDT architecture provides two selectable throws for each signal. Operation is symmetric, so the switch conducts equally well in either direction. The redesigned DG403 family is optimized for high-speed routing rather than high-voltage power switching. Input logic levels are compatible with both TTL and CMOS systems, which simplifies control from common digital controllers while retaining analog operating voltages of ±4.5V to ±20V.
Typical uses include automated test equipment, oscilloscope and measurement front ends, sample-and-hold acquisition systems, data-acquisition modules, and precision signal-conditioning boards. The two independently controlled channels can route one measurement path to a DUT and another to an instrument or termination. For applications requiring extremely low leakage or fixed matched resistance, engineers should compare the DG403DY+ with other members of the DG400 switch family.
Design the layout with short analog traces and a solid ground reference. Keep control traces away from sensitive switched nodes to minimize capacitive coupling. Account for charge injection as a transient step in the output, and use input and output buffering when the source impedance, leakage, or switching glitch would otherwise affect measurement accuracy.
This page consolidates the DG403DY+ electrical characteristics, pin-compatible alternatives, application guidance, and design cautions into a practical engineering reference for selecting and implementing this high-speed dual analog switch.
Alternativas directas para DG403DY+ — mismo encapsulado, compatible pin a pin. Se excluyen las piezas de otro encapsulado que requieren retrabajo de la PCB.
Variantes de esta serie
Modelos de la misma serie compatibles directamente con DG403DY+ (mismo factor de forma y huella) — difiere en Maximum On-Resistance, Off Leakage Current, On-Resistance Flatness, On-Resistance Matching, Typical On-Resistance.
DG403DY
✅ Sustitución directa📋 Alternativa de referencia (no en el catálogo)
DG403CY+
✅ Sustitución directaConsulte el precio
Ver hoja de datos →DG403DY-T1
✅ Sustitución directa📋 Alternativa de referencia (no en el catálogo)
DG403DYZ
✅ Sustitución directa📋 Alternativa de referencia (no en el catálogo)
DG403DY-
✅ Sustitución directa📋 Alternativa de referencia (no en el catálogo)
DG403DY+ Valores máximos y características eléctricas
| Number of Switch Circuits | 2 circuits |
| Switch Configuration | 2:1 SPDT per circuit |
| Maximum On-Resistance | 45Ω |
| Typical On-Resistance | 20Ω |
| On-Resistance Matching | 2Ω maximum |
| On-Resistance Flatness | 3Ω maximum over signal range |
| Positive Supply Range | 10V to 30V |
| Dual-Polarity Signal Range | ±4.5V to ±20V |
| Switching Time | Less than 150ns |
| Charge Injection | 15pC maximum |
| Off Leakage Current | Less than 5nA at +85°C |
| Logic Compatibility | TTL- and CMOS-compatible |
| Signal Conduction | Bidirectional and symmetric |
| Encapsulado | 16-pin NSOIC |
| Tipo de montaje | Surface mount |
| Production Status | Production |
Guía de configuración de pines de DG403DY+ 16-pin nsoic
Configuración de pines para DG403DY+ (encapsulado 16-pin nsoic). La numeración de pines, las funciones y los diagramas de conexión se definen en la hoja de datos del fabricante. Consúltela para conocer el footprint exacto y las directrices de soldadura.
No hay datos detallados de patillaje disponibles para DG403DY+.
Consulte la hoja de datos para ver la configuración completa de patillas.
Aplicaciones típicas
DG403DY+ es adecuado para 6 aplicacións: Automated Test Equipment, Sample-and-Hold Acquisition, Oscilloscope Front-End, Precision Signal Conditioning, Data Acquisition Modules, Industrial Control Signal Routing.
Automated Test Equipment
The DG403DY+ is well suited to automated test systems that route one of two analog signals to a device under test. Its two independent SPDT channels can select between a measurement node and an instrument or termination while the switching time remains below 150ns. The 45Ω maximum on-resistance is useful for moderate-impedance test paths, and the 15pC maximum charge injection limits transient error when the selector changes state. Engineers should account for the 20Ω typical on-resistance when calculating insertion loss and use short, shielded routing to minimize pickup and crosstalk.
Recomendado
Sample-and-Hold Acquisition
The DG403DY+ can implement fast acquisition routing in sample-and-hold systems where settling time and switching transients determine circuit accuracy. A switching time below 150ns supports high-speed sampling, while charge injection of 15pC maximum defines the principal control-induced voltage step. Place each switch close to the sampling network and use a hold capacitor with sufficient value for the required droop. Input and output buffering may be necessary when source impedance is high or the capacitor must retain charge during a long measurement interval.
Recomendado
Oscilloscope Front-End
The DG403DY+ can select between two input sources in a compact oscilloscope or measurement front end. Its below-150ns switching behavior allows fast range or source changes, while 2Ω maximum on-resistance matching helps preserve amplitude balance between the two switched paths. The maximum 45Ω resistance remains significant in high-impedance front ends, so place the device near the input buffer and minimize trace capacitance. Digital control isolation and short ground returns are important for preventing switch transients from appearing on the displayed waveform.
Recomendado
Precision Signal Conditioning
The DG403DY+ provides electronic signal selection in precision conditioning boards where relay switching speed or mechanical life would be undesirable. Its symmetric bidirectional conduction supports routing positive and negative signals, and the ±4.5V to ±20V signal range covers many industrial and instrumentation signals. Designers should evaluate source impedance against the 20Ω typical and 45Ω maximum on-resistance, because the switch can introduce attenuation if driven from a high-impedance source. A nearby low-noise buffer can preserve signal amplitude and improve isolation between the selected paths.
Recomendado
Data Acquisition Modules
The two SPDT channels of the DG403DY+ are useful in modular data-acquisition equipment for selecting sensor outputs, calibration references, or test stimuli. The dual-channel arrangement allows two independent selections on one 16-pin package, reducing board area compared with separate single switches. Its below-150ns switching time supports fast measurement sequences, while TTL- and CMOS-compatible control permits direct interfacing with common acquisition controllers. Keep the analog traces short, maintain a continuous ground plane, and validate settling after each transition before sampling the selected node.
Recomendado
Industrial Control Signal Routing
The DG403DY+ can route low-frequency control and measurement signals within industrial equipment while avoiding the moving contacts and slower switching of a mechanical relay. Its bidirectional SPDT configuration works with dual-polarity signals, and the below-150ns switching time provides rapid path changes. The 10V to 30V supply range supports conventional industrial control rails. Care is still required because 45Ω maximum on-resistance can create voltage division, and 15pC maximum charge injection can disturb high-impedance nodes. Buffering and controlled return paths help preserve signal integrity.
Recomendado
Resumen de productos recomendados
Datos de referencia de ingeniería para DG403DY+ — comparación, orientación de diseño e información de cumplimiento.
Guía de selección
Comparación con alternativas
| Parámetro | Este producto | DG403DY | DG403CY+ | DG403DY-T1 | DG403DYZ | DG403DY- |
|---|---|---|---|---|---|---|
| Brand | Maxim Integrated | Maxim Integrated | Maxim Integrated | Vishay Intertechnology | Vishay Intertechnology | Maxim Integrated |
| Package | NSOIC-16 | NSOIC-16 | NSOIC-16 | SOP16 | SOP16 | NSOIC-16 |
Diferenciadores clave
- Fast dual SPDT routing in one package (frente a DG403DY-T1)
- Guaranteed resistance matching for balanced paths (frente a DG403DYZ)
- Lower specified charge injection for acquisition paths (frente a DG403CY+)
Notas de diseño
Treat the 45Ω maximum on-resistance as a series element in the signal path. With a low-impedance source it usually has limited effect, but with a high-impedance source it can create substantial attenuation. Calculate the complete source, switch, and load divider at the operating frequency, and place a buffer after the switch when preserving amplitude is more important than minimizing component count.
Place the DG403DY+ close to the switched source or acquisition node, and keep each analog path short and symmetrical. Route digital select signals away from the analog nodes to reduce capacitive feedthrough. Maintain a continuous ground reference beneath and around the device, use a solid ground plane, and avoid long stubs or test-point branches that can create impedance discontinuities at the operating bandwidth.
Do not omit the effect of charge injection when using the switch with a sensitive hold capacitor. The specified 15pC maximum charge injection produces a control-induced voltage step proportional to the effective capacitance. Increase hold capacitance only after checking settling requirements, and consider an input buffer or sample-and-hold architecture when the allowable transient is substantially below the switch's charge-injection rating.
Información de cumplimiento
The manufacturer product page identifies the DG403 family as production. Specific environmental, material, and automotive qualification statements require confirmation from the current DG403 documentation.
