DRV8350SRTVR - 102V 3-Phase Smart Gate Driver | Texas Instruments
N.º de pieza: DRV8350SRTVR ✓ Activo| Cant. | Precio unitario | Total |
|---|---|---|
| 1 | $4.85 | $4,85 |
| 10 | $4.36 | $43,60 |
| 100 | $3.88 | $388,00 |
| 500 | $3.49 | $1.745,00 |
| 1.000 | $3.1 | $3.100,00 |
DRV8350SRTVR Descripción general
A three-phase smart gate driver is a mixed-signal IC that sits between a microcontroller/MCU and the three half-bridges of external N-channel power MOSFETs in a BLDC/PMSM inverter stage. It accepts six low-power PWM control inputs (or one to three PWMs with commutation) and produces gate-drive signals capable of switching the high-side FETs with a bootstrap supply and the low-side FETs with VGS drive from VM. As part of the power management hierarchy, it sits between the gate driver family and the broader class of motor driver and motion control ICs, providing the analog/digital interface between low-voltage logic and high-current power conversion.
Key differentiating features include integrated charge-pump ready architecture for 100% duty-cycle high-side drive, three integrated current-shunt amplifiers (CSA) with adjustable gain and bidirectional support, programmable dead time (0.05 ns to 4 us depending on configuration), and comprehensive fault protection: VMOT undervoltage, VDS overcurrent on each FET, gate-driver fault, thermal warning/shutdown, and charge-pump undervoltage. The SPI variants (DRV8350S) also expose registers for fine tuning of CSA gain, OCP threshold, blanking time, and dV/dt control via the gate-drive current bits.
Typical applications include field-oriented control (FOC) BLDC/PMSM motors in e-bikes, drones, cordless power tools, pumps, fans, and small HVAC blowers, as well as industrial servo drives in the 24-V to 80-V bus range. The integrated CSAs reduce BOM count versus discrete op-amp solutions and the wide VM range supports battery packs from 6S Li-ion (25.2V max) to industrial 48-V to 72-V systems. The device is pin-compatible with the DRV8353, DRV8353S, and DRV8323RS in the same WQFN-32 footprint, simplifying platform design across product tiers.
When designing with the DRV8350SRTVR, ensure the VM decoupling (4.7 uF X7R minimum per VM pin) and the VDRAIN/CP bootstrap network is per the datasheet. Verify thermal performance with worst-case VM and switching loss; the WQFN-32 (RTV) package exposes a thermal pad that must be soldered to a sufficiently large copper pour. Use the SPI to log fault registers in production for field diagnostics.
Alternativas directas para DRV8350SRTVR — mismo encapsulado, compatible pin a pin. Se excluyen las piezas de otro encapsulado que requieren retrabajo de la PCB.
Variantes de esta serie
Modelos de la misma serie compatibles directamente con DRV8350SRTVR (mismo factor de forma y huella) — difiere en Operating Temperature Range, Package, MSL Level, Product Type, Integrated Current Shunt Amplifiers.
Herramienta de comparación rápida — seleccione piezas alternativas para compararlas lado a lado:
DRV8350HRTVR
✅ Sustitución directa✓ En stock
$3.1 / unidad
Ver hoja de datos →DRV8350SRTVT
✅ Sustitución directa✓ En stock
$3.05 / unidad
Ver hoja de datos →DRV8353SRTVR
✅ Sustitución directa📋 Alternativa de referencia (no en el catálogo)
DRV8320SRTVT
✅ Sustitución directa📋 Alternativa de referencia (no en el catálogo)
DRV8350SRTVR Valores máximos y características eléctricas
| Product Type | 3-phase smart gate driver |
| Maximum VM Supply Voltage | 102 V |
| Recommended VM Operating Range | 6 V to 95 V |
| Number of Half-Bridge Drivers | 3 |
| Integrated Current Shunt Amplifiers | 3 (bidirectional, programmable gain) |
| Control Interface | SPI (DRV8350S variant) + 6x PWM inputs |
| Integrated LDO | 3.3 V / 5 V selectable |
| Dead-Time Range | Programmable via SPI (0 to ~4 us) |
| Rango de temperatura de funcionamiento | -40 C to +125 C |
| Encapsulado | WQFN-32 (RTV) 5x5 mm with thermal pad |
| Tipo de montaje | Surface Mount |
| Nivel MSL | 2 (per JEDEC J-STD-020) |
| Estado RoHS | Compliant |
| Automotive Grade (Q1) | No - this device is |
| Fault Protections | VM UVLO, VDS OCP, gate-driver fault, thermal warning/shutdown, charge-pump UV |
Configuración de pines de DRV8350SRTVR
| Pin 1 | GHB — Gate drive output for high-side FET of phase B |
| Pin 2 | SHB — Source connection for high-side FET of phase B (bootstrap return) |
| Pin 3 | GLB — Gate drive output for low-side FET of phase B |
| Pin 4 | GLB — Gate drive output for low-side FET of phase B (parallel pin) |
| Pin 5 | INHB — PWM input for phase B high side |
| Pin 6 | INLB — PWM input for phase B low side |
| Pin 7 | GND — Ground (also thermal pad) |
| Pin 8 | VCP — Charge-pump output for high-side supply |
| Pin 9 | VM — Motor supply voltage (6 V to 95 V) |
| Pin 10 | VM — Motor supply voltage (parallel pin) |
| Pin 11 | PVDD — Driver supply for gate drive stage |
| Pin 12 | INHC — PWM input for phase C high side |
| Pin 13 | INLC — PWM input for phase C low side |
| Pin 14 | GLC — Gate drive output for low-side FET of phase C |
| Pin 15 | GLC — Gate drive output for low-side FET of phase C (parallel pin) |
| Pin 16 | SHC — Source connection for high-side FET of phase C |
| Pin 17 | GHC — Gate drive output for high-side FET of phase C |
| Pin 18 | nSCS — SPI active-low chip select (passive pull-up) |
| Pin 19 | SCS — SPI active-high chip select option |
| Pin 20 | SCLK — SPI clock |
| Pin 21 | SDI — SPI data input |
| Pin 22 | SDO — SPI data output |
| Pin 23 | nFAULT — Active-low fault indicator (open-drain) |
| Pin 24 | AVDD — Analog supply (3.3 V LDO output) |
| Pin 25 | SOA — Current-shunt amplifier A output |
| Pin 26 | SNA — Current-shunt amplifier A negative input |
| Pin 27 | SPA — Current-shunt amplifier A positive input |
| Pin 28 | SO2 — Current-shunt amplifier B output |
| Pin 29 | SN2 — Current-shunt amplifier B negative input |
| Pin 30 | SP2 — Current-shunt amplifier B positive input |
| Pin 31 | SO3 — Current-shunt amplifier C output |
| Pin 32 | SN3 — Current-shunt amplifier C negative input |
Aplicaciones típicas
DRV8350SRTVR es adecuado para 6 aplicacións: Brushless DC (BLDC) Motor Drive for Cordless Tools, Field-Oriented Control (FSC) PMSM Servo for Industrial Pumps and Fans, Multirotor Drone ESC (Electronic Speed Controller), E-Bike and E-Scooter Traction Drive, Industrial 48-V Servo and Robotics Drive, Solar Water Pump and Irrigation Drive.
Brushless DC (BLDC) Motor Drive for Cordless Tools
The DRV8350SRTVR drives three external N-channel half-bridges for the BLDC/PMSM motor in 18V-72V cordless tools such as drills, impact drivers, and saws. Its 102-V maximum VM rating tolerates back-EMF spikes during aggressive deceleration of high-KV motors, and the SPI-configurable CSA gain lets the design match shunt resistors across motor power tiers (300 W to 5 kW). Three integrated CSAs simplify FOC firmware with per-phase current sensing, eliminating external op-amps. The 32-pin WQFN (RTV) fits in the compact handle electronics of a hand tool and supports 1.5-A to 5-A continuous phase current with appropriately rated external MOSFETs.
Recomendado
Field-Oriented Control (FSC) PMSM Servo for Industrial Pumps and Fans
In industrial pumps, blowers, and small HVAC servo drives operating from 24-V to 72-V bus rails, the DRV8350SRTVR's SPI interface enables per-axis tuning of CSA gain, OCP threshold, and dead time to match the motor and mechanical load. The integrated charge-pump-ready architecture supports 100% duty-cycle low-side regeneration for braking energy recovery. Three integrated current-shunt amplifiers enable closed-loop torque control for precise flow and speed regulation, while the WQFN-32 (RTV) package suits the embedded control PCB of a fan or blower housing. Operating junction temperature up to 125 C allows placement near the motor.
Recomendado
Multirotor Drone ESC (Electronic Speed Controller)
The DRV8350SRTVR's 102-V VM rating covers 6S to 12S Li-Po drone battery packs (up to 50.4 V nominal) with adequate transient margin, and its small 5x5 mm WQFN footprint fits inside the tight ESC enclosures of multirotor drones weighing 1 kg to 5 kg. SPI access enables per-motor firmware calibration of timing advance and OCP, important for high-RPM racing drones where phase currents can spike above 50 A. Three integrated CSAs cut the BOM count of a 4-layer ESC board by 6 to 9 components versus discrete op-amps. The exposed thermal pad supports high-side N-channel MOSFETs in a 3-phase inverter sized for 20-A to 60-A peak current.
Recomendado
E-Bike and E-Scooter Traction Drive
For e-bikes and e-scooters with 24-V to 48-V battery packs and PMSM traction motors in the 250-W to 1,000-W range, the DRV8350SRTVR drives the 3-phase inverter with sufficient VM margin (102 V max) to absorb inductive kickback during regeneration braking. SPI configurability allows the OEM to tune OCP per battery cell configuration and log fault registers for warranty diagnostics. The integrated LDO powers the companion MCU directly from VM, saving an external regulator. The WQFN-32 (RTV) package's 33 C/W thermal resistance (4-layer board) handles the steady-state dissipation of a 1-kW peak urban commuter drive cycle.
Recomendado
Industrial 48-V Servo and Robotics Drive
In factory automation robotics arms and AGV (automated guided vehicle) wheels powered by 48-V industrial bus, the DRV8350SRTVR's wide VM range supports the bus directly with no preregulation, and SPI-controlled dead time enables precise switching loss optimization for high-torque low-RPM motors. Three integrated CSAs enable closed-loop torque control essential for robotic arm precision. Fault telemetry over SPI supports Industry 4.0 predictive maintenance requirements. The WQFN-32 (RTV) package and 125 C junction temperature suit sealed industrial enclosures where the drive electronics share the motor housing.
Recomendado
Solar Water Pump and Irrigation Drive
For solar-powered submersible pumps and irrigation systems with PMSM motors on 24-V to 72-V battery or directly off PV input, the DRV8350SRTVR's 6-V minimum VM supports low-battery deep-discharge operation. SPI-configurable CSA gain optimizes low-current sensing accuracy during low-sunlight slow-pump cycles. The integrated thermal warning pin enables software-controlled current derating as junction temperature rises. The WQFN-32 (RTV) footprint supports the sealed potting compound typical of submersible pump electronics. With three integrated CSAs and configurable OCP, the design eliminates 6 to 9 external components.
Recomendado
Resumen de productos recomendados
Datos de referencia de ingeniería para DRV8350SRTVR — comparación, orientación de diseño e información de cumplimiento.
Guía de selección
Comparación con alternativas
| Parámetro | Este producto | DRV8350HRTVR | DRV8350SRTVT | DRV8353SRTVR | DRV8320SRTVT |
|---|---|---|---|---|---|
| Package | WQFN-32 (RTV) 5x5 mm | WQFN-32 (RTV) 5x5 mm - same | WQFN-32 (RTV) 5x5 mm - same | WQFN-32 (RTV) 5x5 mm - same | WQFN-32 (RTV) 5x5 mm - same |
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments |
| Maximum VM Supply Voltage | 102 V | 102 V | 102 V | 102 V | 65 V |
| Recommended VM Operating Range | 6 V to 95 V | 6 V to 95 V | 6 V to 95 V | 6 V to 95 V | 6 V to 60 V |
| Control Interface | SPI | Hardware pins | SPI | SPI | SPI |
| Integrated Current Shunt Amplifiers | 3 (bidirectional, programmable gain) | 3 (hardware gain select) | 3 (bidirectional, programmable gain) | 3 (bidirectional, programmable gain) | 1 |
| Integrated Buck Regulator | No | No | No | Yes (integrated buck) | No |
| Integrated LDO | 3.3 V / 5 V selectable | 3.3 V / 5 V selectable | 3.3 V / 5 V selectable | 3.3 V / 5 V selectable | 3.3 V / 5 V selectable |
| Automotive Grade (Q1) | No | No | No | No | No |
| Operating Temperature Range | -40 C to +125 C | -40 C to +125 C | -40 C to +125 C | -40 C to +125 C | -40 C to +125 C |
Diferenciadores clave
- SPI-configurable register access for full digital tuning (frente a DRV8350HRTVR)
- 102-V VM rating covers 12S Li-Po battery packs and industrial 72-V buses (frente a DRV8323RSRGZR)
- Three integrated current-shunt amplifiers eliminate 6-9 external components (frente a DRV8320SRTVT)
Notas de diseño
Estimated: VM decoupling requires at least 4.7 uF X7R ceramic placed within 5 mm of the VM pins, plus a bulk electrolytic of 100 uF or more sized for the motor's inrush current. Each half-bridge high-side supply (GHx/SHx) needs a 0.1 uF X7R bootstrap capacitor between VDRAIN and SHx. Without adequate local capacitance, the PVDD rail sags during MOSFET switching and the gate drive pulses below sDVGS(th) of the external N-channel FETs, leading to shoot-through. Always reference the DRV835x datasheet section 9.2 for the minimum bulk capacitor sizing given the target motor's stall current.
Estimated: at 25 C ambient with the WQFN-32 (RTV) on a 4-layer 1-oz-copper 4-inch-square board, theta_JA is approximately 33 C/W per JEDEC EIA/JESD51 standards. The exposed thermal pad must be soldered to a copper pour of at least 25 mm x 25 mm connected to ground. Power dissipation at 5-A continuous phase current with 50 percent duty cycle and 100 kHz switching is approximately 0.6 W, yielding a 20 C junction temperature rise. At higher ambient (85 C) and higher duty cycle, derate the phase current or add a heatsink to keep Tj below 125 C.
Place the 32-pin WQFN footprint on the top layer with no vias inside the package footprint to avoid solder joint cracking. Use a 4-layer stack-up with a continuous ground plane on layer 2 directly beneath the DRV8350SRTVR to provide thermal spreading and a low-impedance return path for the high-side gate drive return currents. Keep the high-side gate drive traces (GHx/SHx) short (under 10 mm) to minimize ringing that activates VDS OVC false trips. Route the SPI signals (SDI/SDO/SCLK/nSCS) away from the GHx/GLx traces to avoid capacitive coupling into the MCU SPI bus.
Do not operate the DRV8350SRTVR above 95 V VM in steady state - the recommended operating range caps at 95 V even though abs-max is 102 V, to allow transient margin. Ensure the SPI shunting between the MCU and the DRV8350SRTVR does not exceed 100 pF of bus capacitance or the SPI timing margins can fail at 1 MHz SCLK. Always read the fault status register over SPI after each nFAULT assertion to clear the latched fault - the latched fault will keep the gate drivers off until cleared. The integrated charge pump requires the CP capacitor (typically 1 nF) on the VCP pin for proper high-side drive at 100% duty cycle.
The three current-shunt amplifier outputs (SOA, SO2, SO3) are high-impedance analog outputs susceptible to switching noise from the GHx/GLx traces. Place a 100 ohm series resistor at each SOx pin and a 100 pF to 1 nF capacitor to ground close to the ADC input pin of the MCU to form an anti-aliasing filter. The bandwidth of the CSA (default 60 kHz with internal gain) sets the rise time of the CSA output; sample the ADC at 200 kHz or higher for FOC control loops. Use the SPI-configurable CSA gain (5, 10, 20, 40 V/V) to optimize the ADC dynamic range across the motor's operating current envelope.
Información de cumplimiento
RoHS and REACH compliant per TI product page. Not AEC-Q100 qualified - this is the standard (non-automotive) grade. Halogen-free per JEDEC JS709. MSL Level 2 per JEDEC J-STD-020.
