DS90C385AMTX - 87.5MHz 24-Bit LVDS Transmitter | Texas Instruments
N.º de pieza: DS90C385AMTX ✓ ActivoDS90C385AMTX Descripción general
An LVDS transmitter is a high-speed interface device that converts low-voltage complementary logic into low-voltage differential signaling. LVDS belongs to the differential data-interface hierarchy and helps reduce electromagnetic interference while enabling reliable point-to-point links over balanced conductors. In an FPD Link system, the DS90C385AMTX is the transmitter-side device between parallel pixel or control logic and an LVDS-capable display receiver.
The device accepts 28 parallel bits per transmitted clock cycle. At 87.5 MHz, those inputs can carry 24 RGB data bits and three control bits. A separate fifth LVDS link transports the phase-locked transmit clock, allowing the receiver to recover a low-skew sampling reference. The manufacturer describes the DS90C385A family as supporting reduced EMI, a narrower interface bus, and spread-spectrum clocking.
Programmability is a major architectural feature because transmit characteristics can be adjusted through the device's configuration interface rather than relying on entirely fixed outputs. The 3.3 V supply architecture simplifies integration with contemporary CMOS display controllers, while differential outputs support noise-tolerant board and cable connections. The fifth clock link also separates the forwarded clock from the four serialized data pairs, reducing receiver-side clock-recovery complexity.
Typical uses include LCD flat-panel display links, industrial panel interfaces, high-resolution monitor connections, embedded display systems, and other LVDS panels requiring a parallel-to-differential bridge. The 87.5 MHz operating point is especially relevant to 24-bit color display data, where video timing, control metadata, and low-power differential signaling are combined in a compact interface.
PCB design must preserve controlled-impedance differential routing and keep the clock and data pairs length-matched within system requirements. Place decoupling capacitors close to the supply pins, route outputs as short balanced pairs, and avoid unnecessary stubs. Because this is a high-speed interface rather than a power device, thermal analysis is less critical than signal-integrity and layout discipline.
This page combines the manufacturer's functional description with package, interface, application, replacement, and design guidance. It also distinguishes direct pin-compatible family replacements from lower-voltage or otherwise different interface devices so engineers can evaluate board-level compatibility before committing to a substitution.
Alternativas directas para DS90C385AMTX — mismo encapsulado, compatible pin a pin. Se excluyen las piezas de otro encapsulado que requieren retrabajo de la PCB.
Variantes de esta serie
Modelos de la misma serie compatibles directamente con DS90C385AMTX (mismo factor de forma y huella) — difiere en Output Logic, Product Type, Programmability, Supply Voltage.
DS90C385AMT
✅ Sustitución directa📋 Alternativa de referencia (no en el catálogo)
DS90C385AMT/NOPB
✅ Sustitución directa📋 Alternativa de referencia (no en el catálogo)
DS90C385AMTX/NOPB
✅ Sustitución directa📋 Alternativa de referencia (no en el catálogo)
DS90C385MTD
✅ Sustitución directaConsulte el precio
Ver hoja de datos →DS90CP22MTX/NOPB
✅ Sustitución directa📋 Alternativa de referencia (no en el catálogo)
DS90C385AMTX Especificaciones
| Product Type | Programmable LVDS flat-panel-display transmitter |
| Tensión de alimentación | 3.3 V |
| Transmit Clock Frequency | 87.5 MHz |
| Product Headline Clock Frequency | 85 MHz |
| Parallel Input Width | 28 bits |
| RGB Data Capacity | 24 bits |
| Additional Control Data Capacity | 3 bits |
| LVDS Data Streams | 4 differential streams |
| Clock Link | 1 additional differential clock stream |
| Aggregate Data Rate | 2450 Mbps |
| Input Logic | LVCMOS/LVTTL |
| Output Logic | LVDS |
| Encapsulado | 56-pin TSSOP |
| Tipo de montaje | Surface mount |
| Forwarded Clock | Phase-locked transmit clock |
| Programmability | Programmable transmitter configuration |
Guía de configuración de pines de DS90C385AMTX 56-pin tssop
Configuración de pines para DS90C385AMTX (encapsulado 56-pin tssop). La numeración de pines, las funciones y los diagramas de conexión se definen en la hoja de datos del fabricante. Consúltela para conocer el footprint exacto y las directrices de soldadura.
No hay datos detallados de patillaje disponibles para DS90C385AMTX.
Consulte la hoja de datos para ver la configuración completa de patillas.
Aplicaciones típicas
DS90C385AMTX es adecuado para 6 aplicacións: Industrial LCD Panel Interface, High-Resolution Monitor Link, Embedded Human-Machine Interface Display, Medical Diagnostic Display, Video Test and Measurement Equipment, Automotive Display Electronics.
Industrial LCD Panel Interface
The DS90C385AMTX fits industrial LCD panels that accept 24-bit RGB data plus control signaling over LVDS. At an 87.5 MHz transmit clock, the transmitter serializes 28 LVCMOS/LVTTL input bits into four differential data streams and forwards a phase-locked clock over a fifth stream. This reduces the number of conductors crossing the noisy environment between a controller board and display while preserving a dedicated sampling reference. The 2450 Mbps aggregate data capability supports high-resolution industrial panel timing, while the 56-pin TSSOP package supports compact board layouts.
Recomendado
High-Resolution Monitor Link
A high-resolution monitor can use DS90C385AMTX to bridge parallel graphics-controller data to a remote LVDS receiver. The transmitter accepts 24 RGB bits and three control bits each clock cycle, making the 87.5 MHz operating mode suitable for pixel-clock-paced video transport. The separate differential clock link allows the receiver to sample the data without extracting timing from the payload itself. System designers must maintain controlled impedance and closely matched pair lengths so skew and reflections do not impair the 2450 Mbps aggregate interface.
Recomendado
Embedded Human-Machine Interface Display
The DS90C385AMTX is appropriate for embedded HMI systems where a processor or programmable display controller outputs parallel pixel data and the panel uses an LVDS input. Using four differential data pairs instead of a wide parallel bus can reduce connector pin count, cable bulk, and EMI susceptibility across a panel-mounted assembly. The 3.3 V supply operation and programmable transmitter characteristics align well with modern embedded logic. Designers should verify supported panel resolution, refresh rate, synchronization requirements, and the exact receiver clocking scheme before finalizing the interface.
Recomendado
Medical Diagnostic Display
DS90C385AMTX can support the display link in medical diagnostic equipment when the chosen panel and receiver implement a compatible LVDS timing architecture. Its dedicated forwarded clock and four differential data lanes provide a structured path for 24-bit color plus three control bits at an 87.5 MHz transmit clock. Differential signaling is useful in equipment that must move video data across internal cable assemblies while limiting radiated noise. Medical-system qualification still depends on the complete equipment, receiver, panel, safety, and EMC requirements rather than the transmitter alone.
Recomendado
Video Test and Measurement Equipment
DS90C385AMTX is useful in test and measurement equipment that must generate or bridge standardized panel-display traffic. Its programmable LVDS transmitter can accept parallel display data, serialize it over four data links, and transmit a separate phase-locked clock, allowing an instrument to emulate or exercise a display interface. The 2450 Mbps aggregate capability and 56-pin TSSOP package make it practical for dense multi-channel equipment. Test setups should account for receiver tolerance, cable loss, jitter, and the stimulus pattern required by the display under test.
Recomendado
Automotive Display Electronics
DS90C385AMTX can be evaluated for automotive display electronics that use a compatible 3.3 V LVDS panel interface. Its differential data and clock links can reduce signal-integrity and EMI concerns associated with long internal wiring, while the 87.5 MHz mode supports 24-bit color and three control bits. The transmitter should be used only in an ordering configuration and system platform suitable for the automotive temperature, qualification, EMC, and lifecycle requirements. Vehicle-level validation must also cover display temperature behavior, power sequencing, transient protection, and radiated-emissions performance.
Recomendado
Resumen de productos recomendados
Datos de referencia de ingeniería para DS90C385AMTX — comparación, orientación de diseño e información de cumplimiento.
Guía de selección
Comparación con alternativas
| Parámetro | Este producto | DS90C385AMT | DS90C385AMT/NOPB | DS90C385AMTX/NOPB | DS90C385 | DS90CP22MTX/NOPB |
|---|---|---|---|---|---|---|
| Package | 56-pin TSSOP | 56-pin TSSOP | 56-pin TSSOP | 56-pin TSSOP | 56-pin TSSOP | 56-pin TSSOP |
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments |
| Product Type | Programmable LVDS flat-panel-display transmitter | Programmable LVDS flat-panel-display transmitter | Programmable LVDS flat-panel-display transmitter | Programmable LVDS flat-panel-display transmitter | Earlier LVDS flat-panel-display transmitter | LVDS flat-panel-display transmitter |
| Supply Voltage | 3.3 V | 3.3 V | 3.3 V | 3.3 V | 3.3 V | 3.3 V |
Diferenciadores clave
- Dedicated phase-locked clock forwarding (frente a DS90C385)
- Full 28-bit parallel input architecture (frente a DS90C385)
- Programmable flat-panel-display transmitter operation (frente a DS90C385AMT)
- Reduced conductor count through differential serialization (frente a DS90C385)
Notas de diseño
Route every LVDS output as a length-matched differential pair on a continuous reference plane. The four data streams and forwarded clock must preserve consistent pair geometry and spacing, and the pairs should reach the connector or receiver without test pads, vias, or unmatched stubs where avoidable. A common package footprint does not guarantee signal integrity at 2450 Mbps; verify trace length, impedance, insertion loss, skew, and receiver tolerance with the complete board stackup.
Place the 3.3 V supply decoupling network directly beside the transmitter's supply and ground pins. Keep high-current return paths away from sensitive differential output references, and provide a low-impedance ground connection for the clock and data outputs. Verify the DS90C385A datasheet for the exact recommended capacitor values and placement before releasing the layout. These values should not be inferred from the 56-pin package alone.
Treat the phase-locked clock link as part of the high-speed signal set, not as an ordinary low-speed clock. Match clock and data skew according to the receiver's sampling requirements, and account for connector and cable loss at the intended data rate. If the interface crosses a cable or noisy enclosure boundary, add only the filtering or termination explicitly recommended by the system design and validate eye margin at the receiver.
Do not substitute an MPN solely because its description contains LVDS or flat-panel display. Verify the complete 56-pin pinout, supply voltage, input width, differential pair assignments, configuration interface, clock architecture, and maximum operating rate in the manufacturer datasheet. In particular, DS90CP22MTX/NOPB should be used only after its channel arrangement and timing are checked against the existing DS90C385AMTX design.
Información de cumplimiento
The NOPB ordering designation identifies a lead-free configuration, but no explicit RoHS, REACH, halogen-free, or conflict-minerals declaration was included in the manufacturer references. The device is not presented as an AEC-Q100-qualified automotive part.
