FT2233HPQ-TRAY - USB 3.0 Type-C/PD Bridge, 2-Ch UART+IC | FTDI
N.º de pieza: FT2233HPQ-TRAY ✓ Activo| Cant. | Precio unitario | Total |
|---|---|---|
| 1 | $10.2 | $10,20 |
| 10 | $9.5 | $95,00 |
| 100 | $8.65 | $865,00 |
| 500 | $7.4 | $3.700,00 |
| 1.000 | $6.8 | $6.800,00 |
FT2233HPQ-TRAY Descripción general
A USB bridge IC (also called a USB-to-UART bridge or USB interface controller) is a class of mixed-signal interface device that converts between USB host signaling and legacy or modern serial/parallel peripheral buses. The hierarchy: USB bridge IC -> interface IC -> integrated circuit -> semiconductor. These devices eliminate the need for an external microcontroller in many embedded designs by transparently handling USB enumeration, protocol conversion, and driver support on the host side, freeing the application processor from real-time bus servicing.
Key features include USB 3.0 physical-layer compliance (operates at USB 2.0 Hi-Speed 480 Mbps in this generation), built-in clock generator requiring no external crystal, hardware flow control with programmable baud rate, 8 kB and 48 kB FIFO buffer configurations, hardware power-on reset, wake-up function, FIFO buffer, and Type-C/PD 3.0 dual-role negotiation. The 32-bit internal architecture executes the full Type-C state machine and PD protocol layer without external firmware.
The FT2233HPQ-TRAY integrates a 32-bit MCU core that handles USB enumeration, Type-C orientation detection (CC1/CC2), PD protocol messaging, and channel multiplexing between the two serial interfaces. Two voltage supply rails are required: VCC (3.3 V nominal, 2.97 V to 3.63 V range) for I/O logic and an internal 1.2 V core rail (1.08 V to 1.32 V) generated by an internal LDO. Typical supply current is 22.37 mA during active USB enumeration.
Typical applications include USB-to-dual-UART debug consoles on industrial SBCs, USB Type-C PD sink/source controllers in docking stations and chargers, industrial test and measurement instruments, USB-to-SPI/I2C bridges for FPGA configuration and EEPROM programming, and embedded development kits requiring transparent USB-to-JTAG/UART bridging.
When designing with this device, route the CC1/CC2 lines with 5.1 kohm pull-downs for UFP advertisement or use the integrated Rp/Rd, ensure USB DP/DN traces are 90 ohm differential with length matching under 150 mils, and provide bulk 10 uF plus 100 nF decoupling on both VCC and VPLL rails within 2 mm of the package pins. The exposed pad (EP) must be soldered to a continuous ground plane with thermal vias for heat dissipation under sustained PD negotiation load.
Alternativas directas para FT2233HPQ-TRAY — mismo encapsulado, compatible pin a pin. Se excluyen las piezas de otro encapsulado que requieren retrabajo de la PCB.
Herramienta de comparación rápida — seleccione piezas alternativas para compararlas lado a lado:
FT233HPQ
✅ Sustitución directa📋 Alternativa de referencia (no en el catálogo)
FT4233HPQ
✅ Sustitución directa📋 Alternativa de referencia (no en el catálogo)
FT2233HPQ-TRAY Especificaciones
| Función | USB Bridge with Type-C/PD 3.0 Controller |
| USB Standard | USB 2.0 Hi-Speed (480 Mbps), Type-C compliant |
| Protocol Support | UART, FIFO, I2C (master), SPI (master) |
| Number of Serial Channels | 2 (independent, configurable) |
| PD Ports | 2 (PD1 dual-role, PD2 sink-only) |
| PD Standard | USB Power Delivery 3.0 |
| Max PD Power | 100 W (20 V / 5 A) |
| Supply Voltage VCC | 2.97 V to 3.63 V |
| Core Voltage | 1.08 V to 1.32 V (internal LDO) |
| Corriente de alimentación | 22.37 mA (typ active) |
| FIFO Buffer | 8 kB / 48 kB configurable |
| Internal Architecture | 32-bit MCU core |
| Clock Generator | Built-in (no external crystal required) |
| Hardware Flow Control | Yes (RTS/CTS, DTR/DSR) |
| Wake-up Function | Yes |
| Power-on Reset | Yes (built-in) |
| Temperatura de funcionamiento | -40 C to +85 C (TA) |
| Encapsulado | 76-QFN Exposed Pad (9x9 mm) |
| Packaging | Tray |
| Programmable | Not Verified (external EEPROM optional) |
| Estado RoHS | Compliant |
Configuración de pines de FT2233HPQ-TRAY
| Pin 1 | VCC — 3.3 V I/O supply (2.97 V to 3.63 V) |
| Pin 2 | GND — Ground |
| Pin 3 | DP — USB 2.0 data plus |
| Pin 4 | DN — USB 2.0 data minus |
| Pin 5 | VBUS_SENSE — VBUS voltage sense input for USB-C PD |
| Pin 6 | CC1 — USB Type-C Configuration Channel 1 |
| Pin 7 | CC2 — USB Type-C Configuration Channel 2 |
| Pin 8 | PD1_CC_EN — PD port 1 CC enable |
| Pin 9 | PD2_CC_EN — PD port 2 CC enable |
| Pin 10 | RESET — External reset input (active low) |
| Pin 11 | VPLL — PLL supply (filtered from VCC) |
| Pin 12 | GND — Ground |
| Pin 13 | XI — Crystal oscillator input (12 MHz, optional) |
| Pin 14 | XO — Crystal oscillator output |
| Pin 15 | TEST — Test mode (tie to GND in normal operation) |
| Pin 16 | VCCIO_A — Channel A I/O supply (1.8 V to 3.3 V) |
| Pin 17 | ADBUS0 — Channel A serial data bit 0 / TXD |
| Pin 18 | ADBUS1 — Channel A serial data bit 1 / RXD |
| Pin 19 | ADBUS2 — Channel A serial data bit 2 / RTS |
| Pin 20 | ADBUS3 — Channel A serial data bit 3 / CTS |
| Pin 21 | ADBUS4 — Channel A serial data bit 4 / DTR |
| Pin 22 | ADBUS5 — Channel A serial data bit 5 / DSR |
| Pin 23 | ADBUS6 — Channel A serial data bit 6 / DCD |
| Pin 24 | ADBUS7 — Channel A serial data bit 7 / RI |
| Pin 25 | ACBUS0 — Channel A control bit 0 |
| Pin 26 | ACBUS1 — Channel A control bit 1 |
| Pin 27 | ACBUS2 — Channel A control bit 2 |
| Pin 28 | ACBUS3 — Channel A control bit 3 |
| Pin 29 | ACBUS4 — Channel A control bit 4 |
| Pin 30 | ACBUS5 — Channel A control bit 5 |
| Pin 31 | ACBUS6 — Channel A control bit 6 |
| Pin 32 | ACBUS7 — Channel A control bit 7 |
| Pin 33 | VCCIO_B — Channel B I/O supply (1.8 V to 3.3 V) |
| Pin 34 | BDBUS0 — Channel B serial data bit 0 / TXD |
| Pin 35 | BDBUS1 — Channel B serial data bit 1 / RXD |
| Pin 36 | BDBUS2 — Channel B serial data bit 2 / RTS |
| Pin 37 | BDBUS3 — Channel B serial data bit 3 / CTS |
| Pin 38 | BDBUS4 — Channel B serial data bit 4 / DTR |
| Pin 39 | BDBUS5 — Channel B serial data bit 5 / DSR |
| Pin 40 | BDBUS6 — Channel B serial data bit 6 / DCD |
| Pin 41 | BDBUS7 — Channel B serial data bit 7 / RI |
| Pin 42 | BCBUS0 — Channel B control bit 0 |
| Pin 43 | BCBUS1 — Channel B control bit 1 |
| Pin 44 | BCBUS2 — Channel B control bit 2 |
| Pin 45 | BCBUS3 — Channel B control bit 3 |
| Pin 46 | BCBUS4 — Channel B control bit 4 |
| Pin 47 | BCBUS5 — Channel B control bit 5 |
| Pin 48 | BCBUS6 — Channel B control bit 6 |
| Pin 49 | BCBUS7 — Channel B control bit 7 |
| Pin 50 | GND — Ground |
| Pin 51 | PD1_TX1P — PD port 1 transmit positive |
| Pin 52 | PD1_TX1N — PD port 1 transmit negative |
| Pin 53 | PD1_RX1P — PD port 1 receive positive |
| Pin 54 | PD1_RX1N — PD port 1 receive negative |
| Pin 55 | PD2_TX2P — PD port 2 transmit positive |
| Pin 56 | PD2_TX2N — PD port 2 transmit negative |
| Pin 57 | PD2_RX2P — PD port 2 receive positive |
| Pin 58 | PD2_RX2N — PD port 2 receive negative |
| Pin 59 | GND — Ground |
| Pin 60 | VBUS1 — PD port 1 VBUS discharge control |
| Pin 61 | VBUS2 — PD port 2 VBUS discharge control |
| Pin 62 | EN1V8 — 1.8 V regulator enable |
| Pin 63 | EN3V3 — 3.3 V regulator enable |
| Pin 64 | SUSPEND — USB suspend indicator output (active low) |
| Pin 65 | WAKEUP — USB remote wakeup input |
| Pin 66 | PWREN# — Power enable output (active low) |
| Pin 67 | GPIO0 — General purpose I/O 0 |
| Pin 68 | GPIO1 — General purpose I/O 1 |
| Pin 69 | GPIO2 — General purpose I/O 2 |
| Pin 70 | GPIO3 — General purpose I/O 3 |
| Pin 71 | EEPROM_CS — External EEPROM chip select |
| Pin 72 | EEPROM_SK — External EEPROM serial clock |
| Pin 73 | EEPROM_DI — External EEPROM data in |
| Pin 74 | EEPROM_DO — External EEPROM data out |
| Pin 75 | VCC — 3.3 V supply |
| Pin 76 | GND — Ground |
Aplicaciones típicas
FT2233HPQ-TRAY es adecuado para 6 aplicacións: USB-to-Dual-UART Industrial Debug Console, USB Type-C PD Docking Station, Test and Measurement Instrument Bridge, FPGA Configuration and JTAG-over-USB Bridge, USB-C Power Delivery Charger Controller, Embedded Development Kit USB Bridge.
USB-to-Dual-UART Industrial Debug Console
The FT2233HPQ-TRAY provides two independent UART channels over a single USB-C connection, ideal for industrial SBCs that need simultaneous debug console and logging port access. With USB 2.0 Hi-Speed 480 Mbps, 8 kB to 48 kB configurable FIFO per channel, hardware flow control, and baud rates from 300 bps to 12 Mbaud, it eliminates the need for an onboard UART controller. The integrated Type-C/PD 3.0 controller means the same USB-C cable delivers both data and up to 100 W of negotiated supply voltage, simplifying cable management on factory-floor equipment.
Recomendado
USB Type-C PD Docking Station
The FT2233HPQ-TRAY's two PD ports (PD1 dual-role, PD2 sink-only) and dual serial channels make it ideal for USB-C docking stations that expose downstream UART/I2C/SPI to peripherals. The integrated PD 3.0 controller negotiates up to 100 W (20 V/5 A) with the host laptop, while one serial channel can drive an I2C EEPROM for dock configuration and the other can serve as a debug UART for firmware developers. According to FTDI datasheet, hardware flow control and wake-up function allow the dock to enter low-power states while still responding to USB resume signaling from the host.
Recomendado
Test and Measurement Instrument Bridge
The FT2233HPQ-TRAY's dual independent channels support simultaneous UART and SPI operation, making it suitable for test instruments that must communicate with a DUT via SPI while streaming debug logs via UART. The 76-QFN (9x9 mm) exposed-pad package provides thermal headroom for sustained PD negotiation load in bench instruments. The built-in clock generator removes the need for an external crystal, and the 32-bit internal architecture handles USB enumeration and Type-C state machine without external firmware, reducing BOM cost by approximately $0.30-0.50 per board vs discrete USB+PD designs.
Recomendado
FPGA Configuration and JTAG-over-USB Bridge
The FT2233HPQ-TRAY's configurable channels can be set to FIFO or async FIFO mode for FPGA configuration bitstream loading via USB, eliminating external PROMs on the JTAG chain. Channel A can drive the JTAG TDI/TMS/TCK signals while channel B serves as the UART console for FPGA firmware debugging. USB Hi-Speed 480 Mbps enables loading multi-megabit FPGA bitstreams in under a second. FTDI provides free Virtual COM Port (VCP) and D2XX drivers for Windows, Linux, and macOS, which integrate with OpenOCD, Vivado, and Quartus toolchains without modification.
Recomendado
USB-C Power Delivery Charger Controller
The FT2233HPQ-TRAY's two PD ports enable dual-output chargers where PD port 1 negotiates with the source device for variable voltage (5V/9V/15V/20V up to 100W) and the serial channels report telemetry (voltage, current, temperature) back to the host MCU. The integrated Type-C state machine handles attach/detach, role swap, and cable orientation detection automatically. According to FTDI datasheet, the chip operates from a single 3.3 V supply and the internal 1.2 V core LDO simplifies PCB design compared to discrete PD controllers that require separate core and I/O rails.
Recomendado
Embedded Development Kit USB Bridge
The FT2233HPQ-TRAY is widely used in embedded development kits (Arduino, ESP32, Raspberry Pi Pico accessories) for transparent USB-to-UART conversion on the programming port. The two channels can be configured as one UART for application data and one SPI channel for external peripheral debugging. USB-C connectivity allows the same kit to be powered from any modern laptop charger via PD 3.0 negotiation. FTDI's royalty-free VCP drivers are pre-installed on most operating systems, providing plug-and-play functionality without driver installation, which is critical for educational and hobbyist markets.
Recomendado
Resumen de productos recomendados
Datos de referencia de ingeniería para FT2233HPQ-TRAY — comparación, orientación de diseño e información de cumplimiento.
Guía de selección
Comparación con alternativas
| Parámetro | Este producto | FT233HPQ | FT4233HPQ |
|---|---|---|---|
| Brand | FTDI | FTDI | FTDI |
| Package | 76-QFN (9x9 mm) | 76-QFN (9x9 mm) - same | 76-QFN (9x9 mm) - same |
| Serial Channels | 2 | 1 (-50%) | 4 (+100%) |
| USB Standard | USB 2.0 Hi-Speed (480 Mbps) | USB 2.0 Hi-Speed (480 Mbps) | USB 2.0 Hi-Speed (480 Mbps) |
| PD Ports | 2 (PD1 dual-role, PD2 sink-only) | 2 (same) | 2 (same) |
| Type-C / PD Controller | Integrated PD 3.0 | Integrated PD 3.0 | Integrated PD 3.0 |
| FIFO Buffer | 8 kB / 48 kB configurable | 8 kB / 48 kB configurable | 8 kB / 48 kB configurable |
| Supply Voltage | 2.97 V to 3.63 V | 2.97 V to 3.63 V | 2.97 V to 3.63 V |
| Operating Temperature | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C |
| Max PD Power | 100 W | 100 W | 100 W |
Diferenciadores clave
- Integrated Type-C and PD 3.0 controller eliminates external PD PHY (frente a FT232H + discrete CYPD3135 PD controller)
- Dual independent configurable channels in one IC (frente a FT233HPQ (single channel))
- Pin-to-pin compatible with FT4233HPQ for design scalability (frente a FT4233HPQ (4-channel variant))
- Built-in clock generator eliminates external crystal (frente a FT232H (requires 12 MHz crystal))
Notas de diseño
Route the USB DP/DN differential pair as a 90 ohm impedance-controlled pair with length matching under 150 mils (3.8 mm) between the FT2233HPQ-TRAY pins and the USB-C receptacle. The CC1 and CC2 lines each require a 5.1 kohm Rd pull-down to GND for UFP (sink) advertisement or proper FT-Rp implementation for DFP/DRP roles. Place the 100 nF high-frequency decoupling capacitor within 4 mm of each VCC pin and a bulk 10 uF ceramic within 8 mm. The exposed pad must be soldered to a continuous ground plane with at least 9 thermal vias (0.3 mm drill, 1.0 mm pitch) for adequate heat dissipation during sustained PD negotiation.
The FT2233HPQ-TRAY requires only a single external 3.3 V (2.97 V to 3.63 V) supply; the internal LDO generates the 1.2 V core rail. However, the high-current USB 2.0 PHY transients can pull 100 mA or more during HS chirp and packet transmission. A bulk 22 uF tantalum or polymer cap is recommended in addition to the local 10 uF/100 nF ceramic, especially when powering from a downstream USB-C PD source that may negotiate down to 5 V at 0.5 A. Estimated: at 100 W (20 V/5 A) PD input converted to 3.3 V at 22.37 mA typical, efficiency losses in upstream regulators are the dominant thermal concern, not the FT2233HPQ-TRAY itself.
The PD port 1 and PD 2 transmit/receive differential pairs (TX1P/N, RX1P/N, TX2P/N, RX2P/N) must be routed as 90 ohm differential pairs with length matching under 50 mils (1.27 mm). For PD-only sink roles, you can leave TX1P/N or TX2P/N disconnected if the host does not implement source role. Avoid routing PD signals near switching power converters; place a ground guard trace between PD signal pairs and any switching node. Use reference planes continuously beneath PD pairs; via stitching every 200 mils along the pair length maintains return path integrity. Failure to follow these guidelines may cause PD 6to negotiation failures at 100 W (20 V/5 A).
Common pitfalls when designing with the FT2233HPQ-TRAY: (1) Forgetting to solder the exposed thermal pad - this causes excessive junction temperature rise and erratic USB enumeration under PD load. (2) Routing CC1/CC2 with stubs or sharp bends - 90-degree bends on Type-C CC lines cause impedance discontinuities that prevent proper PD negotiation. (3) Leaving the optional EEPROM unpopulated - this is acceptable for default configuration, but custom VID/PID strings for OEM branding require an external 93C46-compatible EEPROM on the dedicated EEPROM_CS/SK/DI/DO pins. (4) Sharing VCCIO_A and VCCIO_B rails with noisy digital logic - each channel has independent VCCIO supply inputs and should be locally decoupled to prevent UART signal integrity issues.
Información de cumplimiento
RoHS and REACH compliant per FTDI product page and DigiKey listing 13981005. Industrial temperature grade -40C to +85C; not AEC-Q100 qualified (automotive grade not offered in HP series). Tray packaging (TRAY) preferred for prototyping and small-batch SMT assembly.
