LAN91C113-NC 10/100 Ethernet MAC/PHY | Microchip Technology
N.º de pieza: LAN91C113-NC ✓ ActivoLAN91C113-NC Descripción general
An Ethernet MAC and PHY single-chip controller is an interface IC that connects an embedded host processor to a copper Ethernet network. The MAC handles Ethernet frame processing and host-facing data exchange, while the PHY converts between digital signaling and the physical signals used on 10/100 Base-T networks. In the broader semiconductor hierarchy, the device belongs to Ethernet controllers, interface controllers, integrated circuits, and networked embedded systems.
The principal feature of the LAN91C113-NC is its combination of a 16-bit parallel host interface with an integrated 10/100 Ethernet MAC and PHY. This integration can simplify embedded networking designs that previously required separate Ethernet controller and physical-layer devices. The 16-bit interface provides a direct path between the controller and a compatible host processor, while on-chip Ethernet physical-layer functionality supports connection to a network transformer and magnetics.
The LAN91C113 family is associated with SMSC's FEAST Fast Ethernet controller technology. Its architecture is intended to provide Ethernet connectivity in embedded systems where a non-PCI parallel interface is preferable to a PCI-based controller. The combined MAC and PHY arrangement also reduces board-level integration complexity by consolidating the digital controller and physical-layer transceiver into one package.
Typical uses for this controller include industrial embedded platforms, data acquisition equipment, communications modules, embedded test systems, and legacy controller-based products being connected to 10/100 Ethernet. It is particularly relevant when the host processor already provides a 16-bit parallel bus and the design needs a dedicated Ethernet interface rather than an integrated network controller in the processor itself.
Design work should begin with the manufacturer pin-description and reference-circuit sections, including the external clock, reset, magnetics, decoupling, and network-isolation requirements. PCB signal integrity is particularly important because the device combines parallel host signaling with Ethernet physical circuitry. Maintain the specified component placement and controlled impedance around the Ethernet network path, and use the manufacturer reference design as the basis for a first revision.
This product page combines the device identity, catalog description, distributor records, package guidance, application analysis, and engineering design notes into one purchasing resource. It also distinguishes direct ordering information from replacement analysis so engineers can assess fit, interface compatibility, and board-level integration before committing a design.
Alternativas directas para LAN91C113-NC — mismo encapsulado, compatible pin a pin. Se excluyen las piezas de otro encapsulado que requieren retrabajo de la PCB.
Variantes de esta serie
Modelos de la misma serie compatibles directamente con LAN91C113-NC (mismo factor de forma y huella) — difiere en Ethernet Speed, Host Interface.
LAN91C113-NU
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Ver hoja de datos →LAN91C113-NC Especificaciones
| Device Type | 10/100 Ethernet single-chip MAC and PHY controller |
| Ethernet Speed | 10/100 Base-T |
| Host Interface | 16-bit parallel interface |
| PCI Interface | Non-PCI |
| MAC Function | Integrated Ethernet media-access controller |
| PHY Function | Integrated 10/100 Ethernet physical-layer transceiver |
| Manufacturer Catalog Designation | LAN91C113 |
| Original Manufacturer | SMSC |
| Product Family | FEAST Fast Ethernet Controller |
| Estado RoHS | unknown |
| REACH Status | unknown |
| Lead-Free Status | unknown |
Guía de configuración de pines de LAN91C113-NC standard
Configuración de pines para LAN91C113-NC (encapsulado standard). La numeración de pines, las funciones y los diagramas de conexión se definen en la hoja de datos del fabricante. Consúltela para conocer el footprint exacto y las directrices de soldadura.
No hay datos detallados de patillaje disponibles para LAN91C113-NC.
Consulte la hoja de datos para ver la configuración completa de patillas.
Aplicaciones típicas
LAN91C113-NC es adecuado para 6 aplicacións: Industrial Embedded Ethernet Controller, Data Acquisition and Control Systems, Communications Gateway Equipment, Embedded Test and Measurement, Legacy PCI-Compatible Equipment Connectivity, Networked Sensor and Monitoring Nodes.
Industrial Embedded Ethernet Controller
The LAN91C113-NC fits an industrial embedded controller that connects a microprocessor or programmable logic design to a 10/100 Base-T network. Its 16-bit parallel host interface provides a direct connection to compatible bus logic, while the integrated MAC and PHY consolidate two Ethernet functions in one controller. This is useful when the host processor does not provide native Ethernet connectivity. The design should use the manufacturer reference circuit for clocking, reset, decoupling, and magnetics. Industrial suitability still depends on confirming the exact operating-temperature grade and long-term lifecycle requirements for the LAN91C113-NC ordering code.
Recomendado
Data Acquisition and Control Systems
The LAN91C113-NC is suitable for a data-acquisition system that must transfer measurement and control traffic over Ethernet. A 16-bit parallel host bus can connect the controller efficiently to an embedded processor, and the integrated 10/100 Base-T PHY removes the need for a separate Ethernet transceiver. This topology is useful for laboratory instruments, factory data loggers, and remote monitoring nodes. A key engineering consideration is maintaining a predictable host-bus layout while isolating the Ethernet magnetics and routing differential network pairs according to the manufacturer reference design.
Recomendado
Communications Gateway Equipment
The LAN91C113-NC can serve as the dedicated Ethernet interface in a communications gateway built around a host processor without an integrated 10/100 controller. Combining the Ethernet MAC and PHY in one device supports a compact board design and reduces the number of high-speed digital and analog interfaces that must be routed. The 16-bit non-PCI host interface is particularly appropriate for embedded processors and bus masters designed for parallel communication. Gateway designs should allow adequate PCB area for the Ethernet transformer, line protection, clock circuitry, and bypass components specified by the manufacturer.
Recomendado
Embedded Test and Measurement
The LAN91C113-NC is applicable to embedded test and measurement equipment that must place captured or generated data onto a 10/100 Ethernet network. Its dedicated MAC and PHY allow a non-PCI host processor to manage Ethernet traffic while the instrument performs measurement functions. The parallel host interface can support deterministic bus transactions in a tightly coupled instrument architecture, subject to the device's specified clock and timing limits. Use short, controlled-impedance host-bus routing and keep the Ethernet magnetics section physically separated from sensitive analog measurement circuitry to reduce coupling.
Recomendado
Legacy PCI-Compatible Equipment Connectivity
The LAN91C113-NC is suited to equipment that requires Ethernet connectivity without using the PCI bus. Its non-PCI, 16-bit parallel interface can bridge an embedded host or application-specific controller to a 10/100 Base-T network, making it useful for upgrading legacy platforms whose processors lack an integrated Ethernet MAC. The design team should verify whether the existing software interface and bus timing can be adapted to the controller's host register and interrupt architecture. Pin assignment, clocking, and reset behavior must be established from the manufacturer documentation before board reuse is attempted.
Recomendado
Networked Sensor and Monitoring Nodes
The LAN91C113-NC can provide wired network connectivity for a monitoring node that gathers sensor data and forwards it through Ethernet. The integrated 10/100 MAC and PHY avoids relying on a higher-speed network interface, while the 16-bit host bus connects the controller to a sensor-processing or communications processor. This arrangement is useful for fixed installations where stable wired connectivity is preferred over a wireless link. Designers should consider the controller's operating-temperature limits, Ethernet isolation requirements, and the influence of long cable runs and external surge events on the complete interface circuit.
Recomendado
Resumen de productos recomendados
Datos de referencia de ingeniería para LAN91C113-NC — comparación, orientación de diseño e información de cumplimiento.
Guía de selección
Comparación con alternativas
| Parámetro | Este producto | LAN91C113-NU |
|---|---|---|
| Brand | Microchip Technology | Microchip Technology |
| Device Type | 10/100 Ethernet single-chip MAC and PHY controller | 10/100 Ethernet controller with MAC and PHY |
| Ethernet Speed | 10/100 Base-T | 10/100 Base-T/TX |
| Host Interface | 16-bit parallel interface | Parallel interface |
| PCI Interface | Non-PCI | Non-PCI |
| Integrated Functions | MAC and PHY | MAC and PHY |
| Product Family | FEAST Fast Ethernet Controller | LAN91C113 family |
Diferenciadores clave
- Integrated Ethernet MAC and PHY in one controller (frente a LAN91C113-NU)
- Direct non-PCI host integration (frente a LAN91C113-NU)
- Established LAN91C113 family positioning (frente a LAN91C113-NU)
Notas de diseño
Use the manufacturer LAN91C113 reference design as the foundation for placement of the controller, clock components, reset circuitry, decoupling capacitors, Ethernet magnetics, and line-side components. Keep the 16-bit host-bus traces short and route them away from the Ethernet transformer and differential line-side region. Maintain the stated component spacing and controlled-impedance geometry so the parallel host interface and Ethernet physical layer operate predictably.
Treat the 16-bit parallel host bus as a synchronous high-speed interface. Match trace lengths where the manufacturer layout requires it, provide continuous reference planes, and place any required termination or clock-synchronization components directly at the relevant controller and host-device pins. Review rise-time and setup-time constraints in the family datasheet, especially when the host clock operates near the device's stated maximum frequency.
Separate the Ethernet magnetics and network-side circuitry from clocks, switching regulators, and sensitive analog stages. Follow the reference layout for the network transformer, center-tap or line-side components, and protective elements rather than improvising a different arrangement. Verify differential pair geometry and return paths under the board fabricator's impedance rules because geometry changes can affect Ethernet signal and isolation performance.
Do not substitute a family member solely because its base number is similar. Confirm the complete ordering code, package dimensions, pin numbering, pin functions, electrical ratings, temperature range, clock requirements, and magnetics configuration for LAN91C113-NC. In particular, LAN91C113-NU is explicitly associated with a 128-TQFP package, so approval as a drop-in candidate requires confirmation that LAN91C113-NC uses that same footprint and pinout.
Información de cumplimiento
The LAN91C113-NC listing identifies the part as a 10/100 Ethernet MAC and PHY but does not state compliance status. Confirm RoHS, REACH, lead-free, halogen-free, conflict-minerals, and automotive qualification information in the manufacturer product documentation or declarations.
