MRFG35003N6T1 - 3W GaAs PHEMT RF Power FET | NXP | 3.5 GHz
N.º de pieza: MRFG35003N6T1 ⚠ Última compra| Cant. | Precio unitario | Total |
|---|---|---|
| 1 | $8.45 | $8,45 |
| 10 | $7.62 | $76,20 |
| 100 | $6.78 | $678,00 |
| 500 | $5.94 | $2.970,00 |
| 1.000 | $5.21 | $5.210,00 |
MRFG35003N6T1 Descripción general
A pHEMT (pseudomorphic High Electron Mobility Transistor) is a type of GaAs field-effect transistor that uses a strained InGaAs channel to deliver high electron mobility, low noise, and high power density at microwave frequencies. In the power-amplifier hierarchy, pHEMT FETs sit between small-signal GaAs MESFETs and GaN HEMTs: they offer materially higher frequency capability and efficiency than silicon LDMOS at sub-6 GHz, while costing less and integrating more easily than GaN. They are used as driver and output stages in customer-premise equipment where linearity, gain, and efficiency must be balanced.
Key features include a 3 W CW output power rating, 9 dB typical power gain at 3.55 GHz, Class AB bias operation, and an unmatched common-source configuration that lets the designer apply external matching for the target band. The device is characterized for use as a driver or pre-driver in CPE radios, with a recommended channel-temperature ceiling of 150 °C for reliable operation. Per the NXP product page, the MRFG35003N6T1 has been removed from the active portfolio; the designated successor is the MRFG35003N6AT1.
Typical applications include 3.5 GHz WLL/MMDS/BWA customer-premise equipment transmitters, UMTS driver stages, and unlicensed 5 GHz band linear amplifiers. Because the part is unmatched, designers must add input and output matching networks tuned to the system frequency, typically microstrip stubs on the PCB substrate.
When designing with this device, ensure that the thermal pad is properly soldered to a sufficient copper area to keep the channel temperature below 150 °C. Decoupling of the 6 V drain supply close to the package is critical for stable RF performance, and a bias sequencing circuit is recommended to avoid simultaneous application of gate and drain voltage.
This page synthesizes distributor pricing, replacement guidance for the end-of-life transition, and practical RF design notes not found in the manufacturer datasheet alone, giving engineers a single authoritative reference for sourcing and substitution.
Alternativas directas para MRFG35003N6T1 — mismo encapsulado, compatible pin a pin. Se excluyen las piezas de otro encapsulado que requieren retrabajo de la PCB.
Herramienta de comparación rápida — seleccione piezas alternativas para compararlas lado a lado:
MRFG35003N6AT1
✅ Sustitución directa📋 Alternativa de referencia (no en el catálogo)
MRFG35003N6T1G
✅ Sustitución directa📋 Alternativa de referencia (no en el catálogo)
MRFG35003N5T1
✅ Sustitución directa ⚠️ Especificaciones sin verificar📋 Alternativa de referencia (no en el catálogo)
MRFG35010N6T1
✅ Sustitución directa ⚠️ Especificaciones sin verificar📋 Alternativa de referencia (no en el catálogo)
MRFG35005N6T1
✅ Sustitución directa ⚠️ Especificaciones sin verificar📋 Alternativa de referencia (no en el catálogo)
MRFG35003N6T1 Valores máximos y características eléctricas
| Tipo de transistor | pHEMT FET (GaAs) |
| Technology | Gallium Arsenide pseudomorphic HEMT |
| Test Voltage (Vds) | 6 V |
| Test Current (Id) | 180 mA |
| Voltage Rated (Max) | 8 V |
| Current Rating | 2.9 A |
| Output Power (Pout) | 3 W |
| Operating Frequency | 3.55 GHz (characterized 0.5 to 5.0 GHz) |
| Power Gain | 9 dB |
| Bias Class | Class AB |
| Configuration | Unmatched, common source |
| Encapsulado / Carcasa | PLD-1.5 (CASE 466-03, STYLE 1) plastic |
| Tipo de montaje | Surface Mount |
| Maximum Channel Temperature | 150 °C |
| Lead Free Status | Lead-free (per DigiKey listing) |
| Application | WLL / MMDS / BWA / UMTS driver |
Configuración de pines de MRFG35003N6T1
| Pin 1 | Gate — RF input gate bias; sequence before drain |
| Pin 2 | Drain — RF output / drain supply (6 V typical) |
| Pin 3 | Source — Source / thermal pad (ground) |
Aplicaciones típicas
MRFG35003N6T1 es adecuado para 6 aplicacións: 3.5 GHz MMDS Transmitter Driver, BWA / WLL Customer-Premise Equipment, UMTS Driver Amplifier Stage, Unlicensed 5 GHz Linear Amplifier, Industrial / Scientific RF Link, Test Equipment / Lab Amplifier.
3.5 GHz MMDS Transmitter Driver
The MRFG35003N6T1's 3 W output power and 9 dB gain at 3.55 GHz make it a natural fit as the driver stage in 3.5 GHz MMDS customer-premise transmitters. Its GaAs pHEMT technology delivers the linearity required for 64-QAM and 256-QAM modulated carriers, while the 6 V drain bias simplifies supply design compared with 28 V LDMOS parts. Placed between the upstream small-signal gain block and the final 10 W PA, the device provides 9 dB of flat gain across the 3.4 to 3.6 GHz MMDS downlink band, with a Class AB bias point that balances efficiency and linearity. External input and output matching networks are required because the device is shipped unmatched.
Recomendado
BWA / WLL Customer-Premise Equipment
Broadband wireless access and wireless local loop systems operating in the 3.5 GHz band use the MRFG35003N6T1 as a 3 W driver to feed a higher-power final stage in outdoor CPE radios. Its characterized 0.5 to 5.0 GHz range lets the same SKU cover multiple regional BWA allocations with only a matching-network change. Operating from a single 6 V rail reduces power-converter complexity and thermal load in the sealed outdoor enclosure, and the PLD-1.5 plastic package keeps board cost low while still supporting the 150 °C channel temperature ceiling for fan A3 follow-up. Designers typically bias at 180 mA quiescent current for Class AB linearity.
Recomendado
UMTS Driver Amplifier Stage
In UMTS infrastructure operating in the 3.5 GHz TDD or FDD bands, the MRFG35003N6T1 serves as a low-cost driver stage ahead of the final LDMOS or GaN PA. Its 9 dB gain and 3 W Pout provide sufficient headroom to push a 10 W or 25 W final stage to full output while the GaAs pHEMT's intrinsic linearity preserves the EVM mask required for 3GPP release specifications. Bias sequencing (gate before drain) is essential to prevent device damage during UMTS ramp-up. The PLD-1.5 footprint allows the same PCB artwork to host either the 3 W MRFG35003N6T1 driver or the higher-power MRFG35010N6T1 final, simplifying a common hardware platform across power tiers.
Recomendado
Unlicensed 5 GHz Linear Amplifier
Although NXP targets the MRFG35003N6T1 at 3.5 GHz, its characterization from 0.5 to 5.0 GHz lets designers repurpose the part in unlicensed 5 GHz linear amplifiers where 3 W of output power is acceptable. The GaAs pHEMT process supports the linearity required for OFDM waveforms used in 5 GHz Wi-Fi and ISM links. At 5 GHz the gain rolls off slightly compared to 3.55 GHz, so a matching network re-tune is mandatory; thermal design must also account for the slightly higher dissipation at the higher operating point. For volume 5 GHz production, however, NXP recommends moving to the MRFG35003N6AT1 successor.
Recomendado
Industrial / Scientific RF Link
Industrial telemetry, point-to-point radio links, and scientific instrumentation operating in the 3.3 to 3.8 GHz band can use the MRFG35003N6T1 as a compact driver stage. Its 6 V supply matches readily available industrial rail voltages, while the PLD-1.5 surface-mount package enables automated assembly on standard SMT lines. The pHEMT technology provides the ruggedness required to tolerate antenna mismatches typical of outdoor industrial installations, as long as the channel temperature remains below the 150 °C datasheet ceiling. When designing for harsh environments, verify the matching network is robust to temperature drift and add an isolator if VSWR is unpredictable.
Recomendado
Test Equipment / Lab Amplifier
In laboratory test setups and bench RF amplifiers, the MRFG35003N6T1 is useful as a 3 W mid-band gain block with predictable 9 dB gain at 3.55 GHz. Engineers can solder it onto a small evaluation PCB with simple microstrip matching to create a quick 3.5 GHz driver for measuring filter loss, antenna patterns, or PA gain. The unmatched configuration gives designers full control over the matching topology, and the 6 V bias lets the lab supply power the part from a standard bench source. Because the device is end-of-life, lab users should consider stocking now or migrating to MRFG35003N6AT1 for long-term availability.
Recomendado
Resumen de productos recomendados
Datos de referencia de ingeniería para MRFG35003N6T1 — comparación, orientación de diseño e información de cumplimiento.
Guía de selección
Comparación con alternativas
| Parámetro | Este producto | MRFG35003N6AT1 | MRFG35003N5T1 | MRFG35005N6T1 | MRFG35010N6T1 |
|---|---|---|---|---|---|
| Brand | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors |
| Package | PLD-1.5 (CASE 466-03) | PLD-1.5 (CASE 466-03) - same | PLD-1.5 (CASE 466-03) - same | PLD-1.5 (CASE 466-03) - same | PLD-1.5 (CASE 466-03) - same |
| Output Power | 3 W | 3 W | 3 W | 5 W | 10 W |
| Test Voltage | 6 V | 6 V | 5 V | 6 V | 6 V |
| Operating Frequency | 3.55 GHz | 3.55 GHz | 3.55 GHz | 3.55 GHz | 3.55 GHz |
| Technology | GaAs pHEMT | GaAs pHEMT | GaAs pHEMT | GaAs pHEMT | GaAs pHEMT |
| Lifecycle Status | Removed from active portfolio (last time buy) | Active replacement | Obsolete / NRND | Obsolete / NRND | Obsolete / NRND |
Diferenciadores clave
- Designated NXP replacement available with identical footprint (frente a MRFG35003N6AT1)
- Same package family offers scalable power tiers (frente a MRFG35010N6T1)
- 5 V variant supports lower-voltage CPE designs (frente a MRFG35003N5T1)
Notas de diseño
Solder the PLD-1.5 thermal pad to at least 1 square inch of 1 oz copper to keep the channel temperature below the 150 °C datasheet ceiling. At 3 W RF output and 6 V bias, the device dissipates roughly 1.5 to 2 W DC plus matching losses; derate output power if ambient temperature exceeds 70 °C or if VSWR-induced heating is expected. Adding thermal vias under the pad significantly lowers junction-to-ambient resistance for outdoor CPE applications.
Place input and output microstrip matching stubs as close to the gate and drain leads as physically possible to minimize parasitic inductance. Keep the 6 V drain supply decoupling (typically 100 pF and 10 nF in parallel) within 2 mm of the drain lead, and route the gate bias through a resistor-isolated bias network to prevent low-frequency oscillation. Use a continuous ground plane on the source/thermal pad side of the PCB.
Do not apply drain voltage before the gate bias is established; the MRFG35003N6T1 requires gate-before-drain sequencing to avoid excessive drain current that can permanently damage the GaAs die. Bias the gate at approximately -0.5 V initially, then ramp to the quiescent point to prevent inrush. Also confirm that the output matching network protects the device under high VSWR conditions - an isolator is recommended if antenna mismatch is unpredictable.
Because the device is unmatched, gain flatness depends entirely on the external matching network. Use vector-network-analyzer tuning with the actual production PCB stack-up; do not rely on generic reference designs. For broadband 0.5 to 5.0 GHz operation, design the matching network for the worst-case band edge, accepting a small in-band ripple in exchange for coverage.
Información de cumplimiento
Lead-free per DigiKey listing (consistent with NXP RoHS-compliant plastic PLD-1.5). REACH, halogen-free and conflict-minerals declarations should be requested from the manufacturer for the latest material declaration.
