PIC32MX130F064D-I/ML - 40MHz 32-bit MCU 64KB Flash 44-QFN
N.º de pieza: PIC32MX130F064D-I/ML ✓ Activo| Cant. | Precio unitario | Total |
|---|---|---|
| 1 | $4.2 | $4,20 |
| 10 | $3.78 | $37,80 |
| 100 | $3.32 | $332,00 |
| 500 | $2.95 | $1.475,00 |
| 1.000 | $2.6 | $2.600,00 |
| 3.000 | $2.3 | $6.900,00 |
PIC32MX130F064D-I/ML Descripción general
A microcontroller (MCU) is a single-chip computer that integrates a CPU core, program memory (Flash), data memory (SRAM), and a rich set of peripherals. The PIC32MX1XX/2XX family sits in Microchip's PIC32 hierarchy: PIC32MX -> MIPS M4K 32-bit MCU -> low-power general-purpose microcontroller -> embedded system on chip. Compared with 8-bit PIC16/PIC18 MCUs, the PIC32MX brings 32-bit datapath performance, DMA, and USB at low cost, while compared with Cortex-M3/M4 it offers Microchip's MPLAB Harmony ecosystem and mTouch capacitive-touch support.
Key features of this variant include two I2S/SPI modules for audio codecs, Peripheral Pin Select (PPS) for flexible I/O mapping, a Parallel Master Port (PMP) for graphics interfaces, mTouch capacitive touch hardware, a 1 ns high-resolution 16-bit timer, an on-chip temperature sensor, and a 10-bit 1 Msps ADC with up to 13 channels. The PPS feature is a major differentiator: it allows digital peripherals to be remapped to most I/O pins at runtime, simplifying PCB layout and BOM.
The architecture uses a 5-stage pipelined MIPS32 M4K core with single-cycle hardware multiply, a Prefetch Cache Controller (PFM) for Flash acceleration, and a separate bus for peripherals. The DMA controller offloads data movement between peripherals and memory, while the PMP provides an 8-bit or 16-bit parallel interface for graphics LCDs, SRAM, or FPGA data transfer.
Typical applications include consumer audio devices, USB HID peripherals, low-cost graphics HMI with PMP-driven LCDs, capacitive touch user interfaces using mTouch, IoT sensor nodes, and industrial control boards. The combination of USB, I2S, PMP, and mTouch in a 44-pin QFN is unusual at this price tier.
When designing with this part, note that the 44-QFN package uses an exposed thermal pad (EP) that must be soldered to a ground copper pour for electrical and thermal performance. The PPS registers must be unlocked and locked after configuration to prevent runaway writes. Programming is supported by MPLAB X IDE, XC32 compiler, and SEGGER J-Link tools.
This page synthesizes distributor pricing, drop-in alternatives within the PIC32MX1XX family, and practical design notes not consolidated in the manufacturer datasheet.
Alternativas directas para PIC32MX130F064D-I/ML — mismo encapsulado, compatible pin a pin. Se excluyen las piezas de otro encapsulado que requieren retrabajo de la PCB.
Variantes de esta serie
Modelos de la misma serie compatibles directamente con PIC32MX130F064D-I/ML (mismo factor de forma y huella) — difiere en Package, Timers, Operating Temperature, ADC, Program Memory (Flash).
Herramienta de comparación rápida — seleccione piezas alternativas para compararlas lado a lado:
PIC32MX130F064D-V/ML
✅ Sustitución directa✓ En stock
$2.15 / unidad
Ver hoja de datos →PIC32MX130F064B-V/ML
✅ Sustitución directa✓ En stock
$2.54 / unidad
Ver hoja de datos →PIC32MX130F064BT-V/ML
✅ Sustitución directa✓ En stock
$0.82 / unidad
Ver hoja de datos →PIC32MX130F064BT-I/ML
✅ Sustitución directa✓ En stock
$1.95 / unidad
Ver hoja de datos →PIC32MX130F064B-V/SS
✅ Sustitución directa✓ En stock
$2.16 / unidad
Ver hoja de datos →PIC32MX130F064D-I/ML Valores máximos y características eléctricas
| Core | MIPS32 M4K |
| CPU Bit Width | 32-bit |
| Maximum CPU Clock | 40 MHz |
| Program Memory (Flash) | 64 KB (64K x 8) |
| Data SRAM | 16 KB |
| Operating Voltage Range | 2.3 V to 3.6 V |
| I/O Pins | 21 |
| Active Current | < 0.5 mA / MHz |
| ADC | 10-bit, 1 Msps, up to 13 channels |
| Timers | Five 16-bit timers |
| Capture/Compare/PWM | 5 CCP modules (16-bit) |
| UART Modules | 2 |
| SPI Modules | 2 (also configurable as I2S) |
| I2C Modules | 2 |
| USB | Full-Speed USB 2.0 Device/Host/OTG |
| Parallel Master Port (PMP) | Yes, 8/16-bit data bus |
| Peripheral Pin Select (PPS) | Yes |
| mTouch Capacitive Touch | Supported (hardware CVD) |
| High-Resolution Timer | 1 ns resolution, 16-bit |
| On-chip Temperature Sensor | Yes |
| DMA | 4 channels |
| Encapsulado | 44-pin QFN (8x8 mm), exposed pad |
| Tipo de montaje | Surface Mount |
| Operating Temperature (Industrial) | -40 C to +85 C |
| Nivel MSL | 3 (168 hours) |
| Estado RoHS | Compliant |
| Lead-Free | Yes |
| Sin halógenos | Yes |
Configuración de pines de PIC32MX130F064D-I/ML
| Pin 1 | RPB0/AN0/RTCC — PPS remappable I/O, analog input 0, RTCC output |
| Pin 2 | RPB1/AN1/C1INC — PPS remappable I/O, analog input 1 |
| Pin 3 | RPB2/AN2 — PPS remappable I/O, analog input 2 |
| Pin 4 | RPB3/AN3 — PPS remappable I/O, analog input 3 |
| Pin 5 | VSS — Ground |
| Pin 6 | RPB4/AN4 — PPS remappable I/O, analog input 4 |
| Pin 7 | RPB5/AN5 — PPS remappable I/O, analog input 5 |
| Pin 8 | RPB6/AN6/PGC1 — PPS remappable I/O, analog input 6, ICSP clock 1 |
| Pin 9 | RPB7/AN7/PGD1 — PPS remappable I/O, analog input 7, ICSP data 1 |
| Pin 10 | VSS — Ground |
| Pin 11 | VDD — Positive supply (2.3 V to 3.6 V) |
| Pin 12 | RPA0/TPGD3/PMA6 — PPS I/O, ICSP data 3, PMP address 6 |
| Pin 13 | RPA1/TPGC3/PMA7 — PPS I/O, ICSP clock 3, PMP address 7 |
| Pin 14 | RPA2/PMALL/PMA8 — PPS I/O, PMP address latch low, PMP address 8 |
| Pin 15 | RPA3/PMALH/PMA9 — PPS I/O, PMP address latch high, PMP address 9 |
| Pin 16 | VDD — Positive supply (2.3 V to 3.6 V) |
| Pin 17 | VSS — Ground |
| Pin 18 | OSC1/CLKI/RC0 — Crystal oscillator input / external clock / I/O |
| Pin 19 | OSC2/CLKO/RC1 — Crystal oscillator output / clock out / I/O |
| Pin 20 | VDD — Positive supply (2.3 V to 3.6 V) |
| Pin 21 | VSS — Ground |
| Pin 22 | RPC0/PMA16 — PPS I/O, PMP address 16 |
| Pin 23 | RPC1/PMA17 — PPS I/O, PMP address 17 |
| Pin 24 | RPC2/PMA18 — PPS I/O, PMP address 18 |
| Pin 25 | RPC3/PMA19 — PPS I/O, PMP address 19 |
| Pin 26 | RPC4/PMD0 — PPS I/O, PMP data 0 |
| Pin 27 | RPC5/PMD1 — PPS I/O, PMP data 1 |
| Pin 28 | RPC6/PMD2 — PPS I/O, PMP data 2 |
| Pin 29 | RPC7/PMD3 — PPS I/O, PMP data 3 |
| Pin 30 | RPC8/PMD4 — PPS I/O, PMP data 4 |
| Pin 31 | RPC9/PMD5 — PPS I/O, PMP data 5 |
| Pin 32 | VSS — Ground |
| Pin 33 | VDD — Positive supply (2.3 V to 3.6 V) |
| Pin 34 | D+/RG0 — USB D+ data line / PPS I/O |
| Pin 35 | D-/RG1 — USB D- data line / PPS I/O |
| Pin 36 | RG2 — PPS remappable I/O |
| Pin 37 | RG3 — PPS remappable I/O |
| Pin 38 | RG6 — PPS remappable I/O |
| Pin 39 | RG7 — PPS remappable I/O |
| Pin 40 | RG8 — PPS remappable I/O |
| Pin 41 | RG9 — PPS remappable I/O |
| Pin 42 | VUSB — USB transceiver supply (3.3 V typical) |
| Pin 43 | VBUS — USB VBUS detect input |
| Pin 44 | RPF0 — PPS remappable I/O |
| Pin EP | EP — Exposed thermal pad - must be soldered to ground copper pour |
Aplicaciones típicas
PIC32MX130F064D-I/ML es adecuado para 6 aplicacións: USB HID Peripherals, Audio Codec Interfaces, Capacitive Touch User Interfaces, Industrial Sensor Nodes, Low-Cost Graphics HMI, IoT Edge Devices.
USB HID Peripherals
The PIC32MX130F064D-I/ML's integrated Full-Speed USB 2.0 controller with Device/Host/OTG modes makes it a strong fit for USB HID peripherals such as keyboards, mice, game controllers, and custom HID input devices. At 40 MHz the MIPS M4K core handles USB interrupt latency, HID report generation, and debounce algorithms simultaneously. The 16 KB SRAM is sufficient for HID report buffers and small descriptor structures, while the 64 KB Flash accommodates USB stacks from Microchip Harmony and custom firmware. Designers can route USB D+/D- to dedicated pins and use PPS to assign remaining peripherals to any of the 21 I/O, simplifying PCB layout. Compared with external USB-to-UART bridges, this solution reduces BOM cost by $0.50-$1.00 and saves board area.
Recomendado
Audio Codec Interfaces
The PIC32MX130F064D-I/ML's two I2S/SPI modules enable direct connection to audio codecs for consumer audio products such as Bluetooth speakers, soundbars, and digital mixers. The DMA controller moves audio samples between the I2S peripheral and SRAM without CPU intervention, leaving MIPS headroom for DSP, mixing, and Bluetooth forwarding. mTouch support adds capacitive volume sliders and play/pause buttons without external ICs. The 10-bit ADC can also be used as a coarse VU-meter input. Pair with the Microchip LAN8770 Ethernet PHY for networked audio applications, or with an external Bluetooth module for wireless audio streaming designs.
Recomendado
Capacitive Touch User Interfaces
The PIC32MX130F064D-I/ML's hardware mTouch CVD front end supports capacitive touch buttons, sliders, and wheels on PCB pads, eliminating mechanical switches in appliances, industrial controls, and consumer devices. With PPS, each touch channel can be routed to any ADC-capable pin, simplifying PCB layout of touch sensors on curved or irregular surfaces. The 1 ns high-resolution timer measures charge/discharge times precisely, enabling robust touch detection even in noisy environments with water or glove overlays. Designers should follow Microchip AN1250 PCB guidelines and use the mTouch Harmony library for proven firmware. Typical BOM savings vs dedicated touch IC: $0.30-$0.80 per board.
Recomendado
Industrial Sensor Nodes
With less than 0.5 mA/MHz active current and an on-chip temperature sensor, the PIC32MX130F064D-I/ML fits battery-powered industrial sensor nodes for monitoring pressure, flow, temperature, or vibration. The 10-bit 1 Msps ADC samples analog transducers directly, while the UART, SPI, and I2C peripherals connect to digital sensors like accelerometers or environmental chips. PPS lets engineers route sensor buses away from noisy switching traces on the same PCB. The -I/ industrial temperature grade supports -40 C to +85 C operation in factory enclosures. Sleep current with RTCC running is under 20 uA, enabling multi-year battery life on 2x AA cells when duty-cycled.
Recomendado
Low-Cost Graphics HMI
The PIC32MX130F064D-I/ML's Parallel Master Port (PMP) drives 8-bit or 16-bit parallel LCDs directly, enabling low-cost graphical HMI panels in appliances, instrument front panels, and small industrial displays. At 40 MHz the M4K core updates small UIs (icons, text, gauges) without external graphics controllers. Combined with mTouch buttons and sliders, designers can build complete UI subsystems around a single MCU. The 44-pin QFN footprint is compact (8x8 mm) and well suited to space-constrained HMI boards. For larger displays (>320x240) consider the PIC32MX370 or PIC32MZ family which add more PMP bandwidth.
Recomendado
IoT Edge Devices
The PIC32MX130F064D-I/ML's combination of USB Device, UART, SPI, and I2C peripherals plus PPS flexibility makes it an effective edge node in IoT gateways, BLE bridge boards, and WiFi co-processor hosts. The 40 MHz MIPS M4K core runs TCP/IP stacks (Microchip Harmony Net) and interfaces to ESP32 or WiFi modules over UART/SPI. The 64 KB Flash holds lightweight TLS stacks, while the 16 KB SRAM buffers MQTT/HTTP payloads. With on-chip temperature sensing and brown-out reset, the device is well suited to industrial IoT deployments where reliability matters. Pair with external SPI Flash (e.g., SST26VF064B) for OTA firmware update storage.
Recomendado
Resumen de productos recomendados
Datos de referencia de ingeniería para PIC32MX130F064D-I/ML — comparación, orientación de diseño e información de cumplimiento.
Guía de selección
Comparación con alternativas
| Parámetro | Este producto | PIC32MX130F064D-V/ML | PIC32MX130F064B-V/ML | PIC32MX130F064BT-V/ML | PIC32MX130F064BT-I/ML | PIC32MX130F064B-V/SS |
|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 44-QFN (8x8 mm) | 44-QFN (8x8 mm) - same | 44-QFN (8x8 mm) - same | 44-QFN (8x8 mm) - same | 44-QFN (8x8 mm) - same | 44-QFN (8x8 mm) - same |
| Maximum CPU Clock | 40 MHz | 40 MHz | 40 MHz | 40 MHz | 40 MHz | 40 MHz |
| Flash Memory | 64 KB | 64 KB | 64 KB (B suffix indicates alternate memory map) | 64 KB | 64 KB | 64 KB |
| SRAM | 16 KB | 16 KB | 16 KB | 16 KB | 16 KB | 16 KB |
| Operating Temperature | -40 C to +85 C (Industrial) | -40 C to +105 C (Extended) | -40 C to +105 C (Extended) | -40 C to +105 C (Extended) | -40 C to +85 C (Industrial) | -40 C to +105 C (Extended) |
| USB | FS USB 2.0 Device/Host/OTG | FS USB 2.0 Device/Host/OTG | FS USB 2.0 Device/Host/OTG | FS USB 2.0 Device/Host/OTG | FS USB 2.0 Device/Host/OTG | FS USB 2.0 Device/Host/OTG |
| PPS Support | Yes | Yes | Yes | Yes | Yes | Yes |
Diferenciadores clave
- Industrial temperature grade in standard lead-free 44-QFN (frente a PIC32MX130F064D-V/ML)
- Higher-density 44-QFN with full USB + PPS + PMP (frente a PIC32MX130F064CT-I/TL)
- Standard memory configuration 64 KB Flash + 16 KB SRAM (frente a PIC32MX130F064B-V/ML)
Notas de diseño
The 44-QFN package has an exposed thermal pad (EP) on the underside that must be soldered to a ground copper pour. At 40 MHz full-load active current of 0.5 mA/MHz * 3.3 V = ~66 mW, dissipation is modest, but the EP also provides the electrical ground reference for the device. A minimum 25 mm^2 copper pour is recommended, with at least 6 thermal vias connecting to an internal ground plane. Without proper EP soldering, thermal resistance rises and EMI/ESD performance degrades.
The PIC32MX130F064D-I/ML has four VDD pins and five VSS pins; each VDD requires a 100 nF decoupling capacitor placed within 2 mm of the pin, and a bulk 4.7 uF to 10 uF tantalum or ceramic capacitor on the main 3.3 V rail. The VUSB pin requires a separate 100 nF decoupling capacitor close to the pin to stabilize the USB transceiver. Failure to decouple VUSB can cause USB enumeration failures and host-port detection issues. Power-on reset is internal; no external POR circuit is needed.
Route USB D+ and D- as a 90 ohm differential pair with length matching within 2 mm. Keep the differential pair away from switching nodes such as DC-DC converters and oscillator traces. The 44-QFN has 0.65 mm pitch and requires 0.25 mm via-in-pad or tented-via escape patterns; consider Microchip's AN26xx PCB layout notes. For PPS signals crossing switching regions, place GND stitching vias every 5 mm along the trace route to control crosstalk.
When configuring PPS, the CFGCON.PPSLOCKED bit must be cleared before writing RPINR/RPOR registers, and re-asserted after configuration to prevent runaway writes from runaway code. ICSP programming uses pins PGEC1/PGED1 by default; ensure these pins are accessible even in production for field firmware updates. The internal 8 MHz fast RC oscillator is sufficient for USB operation but for precise baud rates use an external crystal on OSC1/OSC2. Watch for silicon revision A0 errata affecting DMA under specific conditions.
The exposed pad must NOT be used as the sole ground return path for high-current peripherals such as USB; place four to eight stitching vias inside the EP thermal pad connecting to the internal ground plane. Keep analog input traces short and isolated from digital traces by routing them on opposite sides of the GND plane, or by adding GND guards. mTouch sensing traces should be 0.2-0.5 mm wide, length-matched where possible, and never crossed by digital lines. Follow AN1250 for touch sensor layout.
Información de cumplimiento
RoHS compliant per Microchip product specifications. Industrial temperature grade (-I) is not AEC-Q100 qualified; consult factory for automotive-grade equivalent (PIC32MX1XX family does not offer AEC-Q100 parts).
