10AS032H1F35E1HG vs 10AS032H2F35E1HG Comparaison
Comparaison détaillée côte à côte de 10AS032H1F35E1HG par Intel et 10AS032H2F35E1HG par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | 10AS032H1F35E1HG | 10AS032H2F35E1HG |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $2 540,00 | $1 293,00 |
| Manufacturer | Intel (formerly Altera) | — |
| Series | Arria 10 SX | — |
| Device Type | System on Chip (SoC) FPGA | — |
| Logic Elements | 320K | 320,000 |
| Hard Processor Subsystem (HPS) | Dual-core ARM Cortex-A9 MPCore with CoreSight | — |
| HPS Maximum Frequency | 1.5 GHz | — |
| Boîtier | 1152-FBGA, FC (Flip-Chip BGA), 35x35 mm | 1152-ball FCBGA (35 x 35 mm) |
| User I/O Count | 384 | — |
| Process Technology | 20nm TSMC | — |
| Embedded Memory | M20K blocks (variable, density per family) | — |
| DSP Blocks | Variable-precision DSP blocks | — |
| Transceivers | Multi-gigabit transceivers (up to 24 channels, family-wide) | — |
| External Memory Interfaces | DDR4, DDR3, RLDRAM3, QDRII+ | — |
| Hard Memory Controller | Yes | — |
| Hard PCIe | PCI Express Gen3 controllers (hard IP) | — |
| Partial Reconfiguration | Supported | — |
| Température de fonctionnement | Industrial / Extended grade (per part suffix) | — |
| Type de montage | Surface Mount (BGA) | Surface Mount (Flip-Chip BGA) |
| Statut RoHS | Compliant | Compliant [DATA_NEEDED: per specific PCN or compliance certificate] |
| Lead-Free | Yes | — |
| Device Family | — | Arria 10 SX SoC FPGA |
| Product Type | — | System-on-Chip (SoC) FPGA |
| Processor Core | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| User I/Os | — | 384 |
| Maximum Transceiver Data Rate | — | 1.5 GHz [DATA_NEEDED: actual Gbps line rate per protocol] |
| Operating Temperature Grade | — | Industrial (E1) |
| Process Node | — | 20 nm [DATA_NEEDED: exact process geometry per Intel datasheet] |
| Configuration | — | Serial (E1 suffix) |
| Tension d'alimentation | — | [DATA_NEEDED: core/aux/HPS voltage rails per datasheet] |
| Niveau MSL | — | [DATA_NEEDED: MSL rating from JEDEC J-STD-020] |
| Hard Processor System | — | HPS with Cortex-A9 dual core, L1/L2 cache, peripherals |