10AS032H4F34I3SG vs 10AS048H2F34E2LG Comparaison
Comparaison détaillée côte à côte de 10AS032H4F34I3SG par Intel et 10AS048H2F34E2LG par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
10AS048H2F34E2LG - Arria 10 SX 480K SoC FPGA, Dual A9, 1152-FBGA | Intel
10AS048H2F34E2LG ✓ ActifComparaison des spécifications
| Paramètre | 10AS032H4F34I3SG | 10AS048H2F34E2LG |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $3 150,00 | $2 280,00 |
| Family | Arria 10 SX SoC FPGA | Arria 10 SX |
| Logic Elements | 320000 | 480000 |
| Hard Processor System | Dual ARM Cortex-A9 MPCore with CoreSight | Dual ARM Cortex-A9 MPCore with CoreSight |
| HPS Maximum Frequency | 1.5 GHz | 1.5 GHz |
| Process Technology | 20 nm | 20 nm |
| Core Voltage | 0.9 V | 0.9 V |
| Nombre de broches | 1152 | — |
| Boîtier | FCBGA-1152 (F34, 35 x 35 mm) | 1152-ball FC-FBGA (F34), 35 x 35 mm |
| Package Code | F34 | — |
| Speed Grade | H4 | — |
| Temperature Grade | Industrial (I) | — |
| Type de montage | Surface Mount (BGA ball grid) | Surface Mount (flip-chip BGA) |
| Statut RoHS | Compliant | Compliant |
| DSP Blocks | [DATA_NEEDED: DSP block count] | [DATA_NEEDED: variable-precision DSP block count] |
| Embedded Memory | [DATA_NEEDED: embedded memory Mbits] | — |
| Transceiver Count | [DATA_NEEDED: transceiver count and rate] | — |
| PCIe Hard IP | [DATA_NEEDED: PCIe hard IP generation/lane count] | — |
| Operating Temperature Grade | — | Industrial / Medical (per OPN code H2) |
| Logic Family | — | Arria 10 SoC FPGA |
| Adaptive Logic Modules | — | [DATA_NEEDED: ALM count] |
| Embedded Memory (M20K) | — | [DATA_NEEDED: Mbits] |
| Transceivers | — | [DATA_NEEDED: number / data rate] |
| User I/O Banks | — | [DATA_NEEDED: bank count and total user I/O] |
| Niveau MSL | — | 3 (per FBGA package) |