10AS048E4F29E3SG vs 10AS048E4F29E3LG Comparaison
Comparaison détaillée côte à côte de 10AS048E4F29E3SG par Altera et 10AS048E4F29E3LG par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
10AS048E4F29E3LG - Arria 10 SX 480K LE SoC FPGA, 1.5GHz, 780-FBGA | Intel
10AS048E4F29E3LG ✓ ActifComparaison des spécifications
| Paramètre | 10AS048E4F29E3SG | 10AS048E4F29E3LG |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $3 120,00 | $1 350,00 |
| Device Family | Arria 10 SX | — |
| Part Number Decoder | 10AS048E4F29E3SG | — |
| Logic Elements | 480,000 | 480,000 |
| Process Technology | 20 nm | — |
| Core Voltage | 0.9 V | — |
| HPS Processor | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| HPS Max Frequency | 1.5 GHz | — |
| Boîtier | 780-FBGA, FC (29x29 mm) | 780-pin FC-FBGA (F29, 29x29 mm) |
| Package Code | BGA | — |
| Type de montage | Surface Mount | Surface Mount (FC-FBGA) |
| Temperature Grade (Decoder) | E3 (commercial) | — |
| Statut RoHS | Compliant | Compliant (per Altera product page) |
| Type de mémoire | M20K embedded SRAM blocks | — |
| Hard IP Controllers | DDR4/3, LPDDR4/3, PCIe Gen2/Gen3 | — |
| Plage de température de fonctionnement | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: industrial / commercial temperature grade] |
| MPN | — | 10AS048E4F29E3LG |
| Family | — | Arria 10 SX |
| Processor Core | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| Maximum Operating Frequency | — | 1.5 GHz |
| Device Grade | — | Enhanced (E4) |
| Transceiver Count | — | [DATA_NEEDED: number of transceiver channels] |
| DSP Blocks | — | [DATA_NEEDED: variable-precision DSP block count] |
| Embedded Memory | — | [DATA_NEEDED: M20K total bits and MLAB size] |
| Hard Memory Controller | — | [DATA_NEEDED: DDR3/DDR4 controller count] |
| PCIe Hard IP | — | [DATA_NEEDED: PCIe Gen3 hard IP lanes] |
| Configuration Modes | — | JTAG, AS (Active Serial), PS (Passive Serial) |
| Process Node | — | TSMC 20 nm |
| Lead-Free | — | Yes |