10AS048H2F34I2LG vs 10AS048H1F34E1HG Comparaison
Comparaison détaillée côte à côte de 10AS048H2F34I2LG par Intel et 10AS048H1F34E1HG par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
10AS048H1F34E1HG - Arria 10 SX SoC FPGA, 480K LE, Dual A9, 1152-FBGA | Intel (Altera)
10AS048H1F34E1HG ✓ ActifComparaison des spécifications
| Paramètre | 10AS048H2F34I2LG | 10AS048H1F34E1HG |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $2 712,45 | $3 048,91 |
| Family | Arria 10 SX SoC FPGA | — |
| Logic Elements | 480,000 | 480K |
| Process Technology | 20 nm TSMC | 20 nm |
| Hard Processor System | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| Maximum Core Frequency (HPS) | 1.5 GHz | — |
| Boîtier | 1152-ball FCBGA (F34), 35 x 35 mm | 1152-FBGA, FC (35x35 mm) |
| Transceivers | [DATA_NEEDED: number of transceivers and max data rate] | Multi-gigabit (per H1 grade) |
| Embedded Memory | [DATA_NEEDED: M20K blocks and total bits] | — |
| DSP Blocks | [DATA_NEEDED: variable-precision DSP count and throughput] | Variable-precision DSP (per Arria 10 family) |
| Hard Memory Controllers | DDR3 / DDR4 hard controllers (HPS and FPGA fabric) | — |
| PCIe Hard IP | PCI Express Gen2/Gen3 hard IP blocks | — |
| HPS Peripherals | Gigabit Ethernet MAC, USB 2.0 OTG, UART, SPI, I2C, SD/eMMC, NAND | — |
| Operating Temperature Grade | Industrial (-40C to +100C) | — |
| Speed Grade | I2 (intermediate, industrial) | — |
| Statut RoHS | Compliant | Compliant (HG suffix) |
| Niveau MSL | 3 (per FCBGA moisture sensitivity) | — |
| Type de montage | Surface Mount (FCBGA) | Surface Mount (flip-chip BGA) |
| Supply Voltage Core | 0.85 V core, 0.95 V transceiver, 1.8 V/3.3 V IO (typical) | — |
| Series | — | Arria 10 SX |
| Device Type | — | SoC FPGA (FPGA + ARM Cortex-A9 HPS) |
| Architecture | — | Hard Processor System (HPS) + Programmable Logic |
| Processor Core | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| User I/O Count | — | 492 |
| Operating Frequency (HPS) | — | 1.5 GHz |
| Temperature Grade | — | Industrial (E1) |
| Memory Interfaces | — | DDR3 / DDR4 with hard controllers |