10AS048K1F35E1HG vs 10AS048K2F35E2LG Comparaison
Comparaison détaillée côte à côte de 10AS048K1F35E1HG par Intel et 10AS048K2F35E2LG par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | 10AS048K1F35E1HG | 10AS048K2F35E2LG |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $3 850,00 | $4 150,00 |
| Product Series | Arria 10 SX SoC FPGA | — |
| Logic Elements | 480,000 | 480,000 |
| Hard Processor System | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| HPS Clock Speed | Up to 1.5 GHz | — |
| Process Technology | 20 nm | 20 nm |
| Boîtier | 1152-ball FC-BGA (flip-chip), 35x35 mm | 1152-FBGA, FC (35x35 mm) |
| Type de montage | Surface Mount | Surface Mount (Flip-Chip BGA) |
| Température de fonctionnement | Industrial / commercial per part number suffix | Extended (per device grade) |
| Memory Interfaces | DDR4, DDR3, LPDDR3, QDR IV (hard controllers) | — |
| Transceivers | Multi-gigabit serial transceivers, up to 17.4 Gbps (family) | Up to 24 channels, up to 17.4 Gbps |
| DSP Blocks | Variable-precision DSP blocks (per family) | Variable-precision, fixed/floating point |
| On-chip RAM | M20K memory blocks + MLAB (per family) | — |
| HPS Peripherals | Gigabit Ethernet, USB 2.0 OTG, SD/SDIO/MMC, SPI, I2C, UART, CAN | — |
| Hard IP Blocks | PCIe Gen3 (hard), 10/40 GbE MAC, DDR controllers, partial reconfiguration | — |
| Configuration | FPGA fabric + HPS independent configuration, supports AS/PS/JTAG | — |
| Statut RoHS | Compliant | Compliant |
| REACH Status | [DATA_NEEDED: REACH compliance] | — |
| Design Software | Intel Quartus Prime (legacy: Altera Quartus II) | — |
| Product Type | — | FPGA - SoC (System-on-Chip) |
| Series | — | Arria 10 SX |
| Hard Processor Subsystem | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| HPS Maximum Frequency | — | 1.5 GHz |
| Core Voltage | — | 0.9 V |
| Nombre de broches | — | 1152 |
| Package Code | — | BGA (Flip-Chip) |
| Terminal Form | — | Ball |
| Embedded Memory | — | 28.05 Mbits (MLAB + M20K blocks) |