10AS048K2F35E2LG vs 10AS048K1F35E1HG Comparaison
Comparaison détaillée côte à côte de 10AS048K2F35E2LG par Intel et 10AS048K1F35E1HG par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | 10AS048K2F35E2LG | 10AS048K1F35E1HG |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $4 150,00 | $3 850,00 |
| Product Type | FPGA - SoC (System-on-Chip) | — |
| Series | Arria 10 SX | — |
| Logic Elements | 480,000 | 480,000 |
| Hard Processor Subsystem | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| HPS Maximum Frequency | 1.5 GHz | — |
| Process Technology | 20 nm | 20 nm |
| Core Voltage | 0.9 V | — |
| Boîtier | 1152-FBGA, FC (35x35 mm) | 1152-ball FC-BGA (flip-chip), 35x35 mm |
| Type de montage | Surface Mount (Flip-Chip BGA) | Surface Mount |
| Nombre de broches | 1152 | — |
| Package Code | BGA (Flip-Chip) | — |
| Terminal Form | Ball | — |
| Embedded Memory | 28.05 Mbits (MLAB + M20K blocks) | — |
| DSP Blocks | Variable-precision, fixed/floating point | Variable-precision DSP blocks (per family) |
| Transceivers | Up to 24 channels, up to 17.4 Gbps | Multi-gigabit serial transceivers, up to 17.4 Gbps (family) |
| Température de fonctionnement | Extended (per device grade) | Industrial / commercial per part number suffix |
| Statut RoHS | Compliant | Compliant |
| Product Series | — | Arria 10 SX SoC FPGA |
| Hard Processor System | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| HPS Clock Speed | — | Up to 1.5 GHz |
| Memory Interfaces | — | DDR4, DDR3, LPDDR3, QDR IV (hard controllers) |
| On-chip RAM | — | M20K memory blocks + MLAB (per family) |
| HPS Peripherals | — | Gigabit Ethernet, USB 2.0 OTG, SD/SDIO/MMC, SPI, I2C, UART, CAN |
| Hard IP Blocks | — | PCIe Gen3 (hard), 10/40 GbE MAC, DDR controllers, partial reconfiguration |
| Configuration | — | FPGA fabric + HPS independent configuration, supports AS/PS/JTAG |
| REACH Status | — | [DATA_NEEDED: REACH compliance] |
| Design Software | — | Intel Quartus Prime (legacy: Altera Quartus II) |