10AS057K2F35I2SG vs 10AS057K2F35E2LG Comparaison
Comparaison détaillée côte à côte de 10AS057K2F35I2SG par Intel et 10AS057K2F35E2LG par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | 10AS057K2F35I2SG | 10AS057K2F35E2LG |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $3 198,40 | $3 450,00 |
| Family | Arria 10 SX SoC FPGA | Arria 10 SX SoC FPGA |
| Logic Elements | 570K | 570,000 |
| Processor Core | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| Maximum Core Frequency | 1.5 GHz | — |
| Speed Grade | -2 | E2 (commercial/extended) |
| Boîtier | 1152-ball FC-FBGA (F35), 35x35 mm | 1152-ball FCBGA, 35 mm x 35 mm, 1.0 mm pitch |
| Température de fonctionnement | -40C to +100C (Industrial) | -40C to +100C (extended-industrial screening) |
| User I/O Count | 396 (per Heisener parametric data) | — |
| Process Node | 20 nm TSMC | TSMC 20 nm |
| Transceivers | [DATA_NEEDED: transceiver count and max data rate] | Up to 24 channels, up to 17.4 Gbps |
| DSP Blocks | [DATA_NEEDED: DSP block count] | [DATA_NEEDED: 18x19 multiplier count] |
| Embedded Memory | [DATA_NEEDED: M20K / MLAB bit count] | — |
| HPS Peripherals | EMAC, USB 2.0 OTG, SPI, I2C, NAND/NOR flash controllers, SD/MMC | — |
| Memory Interfaces | DDR3/DDR4/LPDDR3 hard controllers (Arria 10 HPS) | DDR3/DDR4 with hard PHY (HPS + FPGA) |
| Configuration | FPGA + HPS independent / coordinated boot | SRAM-based, partial reconfiguration, SEU mitigation, ECC |
| Statut RoHS | Compliant (lead-free finish) | Compliant |
| Type de montage | Surface Mount (BGA) | — |
| Niveau MSL | [DATA_NEEDED: MSL rating per JEDEC J-STD-020] | — |
| HPS Cores | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| HPS Max Frequency | — | 1.5 GHz |
| Embedded Memory (M20K) | — | [DATA_NEEDED: M20K block count and total bits] |
| PCIe Hard IP | — | Gen3 x4 (rootport/endpoint) |
| User I/Os | — | 396 |
| Lead-Free | — | Yes |