10AS057K2F35I2SG vs 10AS057K2F35E2SG Comparaison
Comparaison détaillée côte à côte de 10AS057K2F35I2SG par Intel et 10AS057K2F35E2SG par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | 10AS057K2F35I2SG | 10AS057K2F35E2SG |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $3 198,40 | $2 304,55 |
| Family | Arria 10 SX SoC FPGA | Arria 10 SX SoC FPGA |
| Logic Elements | 570K | 570,000 |
| Processor Core | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| Maximum Core Frequency | 1.5 GHz | — |
| Speed Grade | -2 | E2 (mid-tier) |
| Boîtier | 1152-ball FC-FBGA (F35), 35x35 mm | 1152-FBGA, FC (35x35 mm) |
| Température de fonctionnement | -40C to +100C (Industrial) | [DATA_NEEDED: commercial/industrial grade range] |
| User I/O Count | 396 (per Heisener parametric data) | — |
| Process Node | 20 nm TSMC | 20 nm (TSMC) |
| Transceivers | [DATA_NEEDED: transceiver count and max data rate] | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | — |
| Embedded Memory | [DATA_NEEDED: M20K / MLAB bit count] | — |
| HPS Peripherals | EMAC, USB 2.0 OTG, SPI, I2C, NAND/NOR flash controllers, SD/MMC | — |
| Memory Interfaces | DDR3/DDR4/LPDDR3 hard controllers (Arria 10 HPS) | — |
| Configuration | FPGA + HPS independent / coordinated boot | — |
| Statut RoHS | Compliant (lead-free finish) | Compliant (lead-free) |
| Type de montage | Surface Mount (BGA) | Surface Mount (FCBGA) |
| Niveau MSL | [DATA_NEEDED: MSL rating per JEDEC J-STD-020] | [DATA_NEEDED: MSL rating] |
| Adaptive Logic Modules (ALMs) | — | [DATA_NEEDED: ALM count for 570K LE Arria 10 SX] |
| Embedded Memory (M20K blocks) | — | [DATA_NEEDED: M20K count for 570K LE] |
| Embedded Memory (MLAB bits) | — | [DATA_NEEDED: MLAB bits for 570K LE] |
| DSP Blocks (18x19 Multipliers) | — | 1,568 |
| HPS Core | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| HPS Max Frequency | — | 1.5 GHz |
| Maximum User I/O | — | 396 |
| Transceiver Count (GX/SX) | — | 24 |
| Transceiver Max Data Rate | — | 17.4 Gbps |
| Hard PCIe Blocks | — | Gen2/Gen3 x4/x8 IP |