10AX090U3F45E2LG vs 10AX090U2F45E2LG Comparaison
Comparaison détaillée côte à côte de 10AX090U3F45E2LG par Intel et 10AX090U2F45E2LG par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | 10AX090U3F45E2LG | 10AX090U2F45E2LG |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $6 900,00 | $3 647,50 |
| Series | Arria 10 GX | — |
| Logic Elements (LE) | 900,000 | — |
| Number of Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count] | — |
| Embedded Memory Bits | 59,234,304 bits | — |
| Number of Transceivers | 48 transceiver macro channels (480 I/O references) | — |
| Maximum Transceiver Data Rate | [DATA_NEEDED: exact Gbps] | — |
| Hard Memory Controllers | Yes - DDR4, DDR3, QDR IV, RLDRAM 3 with hardened PHY | — |
| Hard PCIe Controllers | PCIe Gen3 x8 | — |
| Hard Ethernet MACs | 10GbE and 100GbE MACs | — |
| Adaptive Logic Modules (ALMs) | [DATA_NEEDED: ALM count] | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | — |
| Number of I/O Banks | [DATA_NEEDED: bank count] | — |
| Maximum User I/O Pins | 480 (per DigiKey listing) | — |
| Boîtier | 1932-BBGA, FCBGA | 1932-ball FCBGA |
| Package Pin Pitch | [DATA_NEEDED: pitch] | — |
| Operating Temperature Grade | OTHER / Extended (per Partstack listing) | — |
| Process Technology | 20nm TSMC | 20nm |
| Configuration Method | Serial (active/passive) and parallel via Quartus Prime | Active serial, passive parallel, JTAG |
| Statut RoHS | Compliant | Compliant |
| Development Tool | Intel Quartus Prime | — |
| Family | — | Arria 10 GX |
| Logic Elements | — | 900,000 |
| Embedded Memory | — | 59,234,304 bits |
| User I/O Pins | — | 480 |
| Core Voltage | — | 0.9 V |
| Speed Grade | — | -2 |
| Temperature Range | — | 0C to 100C (E2 - extended) |
| Transceiver Data Rate | — | Up to 14.1 Gbps |
| PCI Express Hard IP | — | Gen3 (hardened) |
| Memory Controllers | — | Gen2 hard memory controllers |
| Niveau MSL | — | 4 (per JEDEC J-STD-020) |
| Lead-Free / Halogen-Free | — | Yes / [DATA_NEEDED: halogen-free status] |