10M16SAU169I7G vs 10M08SCU169I7G Comparaison
Comparaison détaillée côte à côte de 10M16SAU169I7G par Altera et 10M08SCU169I7G par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | 10M16SAU169I7G | 10M08SCU169I7G |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $47,56 | $9,85 |
| Product Type | Field Programmable Gate Array (FPGA) | — |
| Product Family | MAX 10 | — |
| Device Variant | 10M16 | — |
| Logic Elements | 16000 | — |
| Embedded Memory | 562176 bits | — |
| User I/O | 130 | — |
| Boîtier | 169-LFBGA | 169-ball UFBGA / UBGA (U169), 11 mm x 11 mm, 0.65 mm pitch |
| Alternate Package Description | 169-UBGA | — |
| Package Type | Ball Grid Array | — |
| Process Technology | 55 nm | TSMC 55 nm embedded flash |
| Integrated M9K SRAM | 549 KB | — |
| User Flash Memory | 549 Kbit | — |
| Integrated ADC | 12 bit | — |
| Phase-Locked Loops | 4 | — |
| Configuration Type | Non-volatile | — |
| Ordering Temperature Classification | Industrial | — |
| Speed Grade | 7 | — |
| Core Voltage | [DATA_NEEDED: core voltage] | — |
| I/O Voltage | [DATA_NEEDED: I/O voltage] | — |
| Plage de température de fonctionnement | [DATA_NEEDED: operating temperature range] | — |
| Family | — | MAX 10 |
| Logic Elements (LE) | — | 8,000 |
| Embedded Memory (M9K blocks) | — | [DATA_NEEDED: M9K count and total bits] |
| Embedded User Flash | — | 387,072 bits (48 KB) |
| User I/O Count | — | 130 |
| Maximum User I/O (package) | — | 130 (U169) |
| Core Voltage (VCCINT) | — | 1.2 V |
| Configuration Memory | — | Internal flash (non-volatile, dual-boot) |
| Température de fonctionnement | — | -40 C to +100 C (industrial, suffix I7G) |
| PLL Count | — | [DATA_NEEDED: number of PLLs] |
| Global Clock Networks | — | [DATA_NEEDED: global clock count] |
| DSP Blocks (18x18 multipliers) | — | [DATA_NEEDED: multiplier count] |
| ADC | — | 12-bit, 1 MSPS, 4 channels (single supply variant) |
| Type de montage | — | Surface Mount (BGA) |
| Lead-Free / RoHS | — | Yes / Compliant |
| Niveau MSL | — | 3 (per JEDEC J-STD-020) |
| Configuration Method | — | JTAG, internal flash, dual-boot |
| Supported I/O Standards | — | LVCMOS, LVTTL, LVDS, SSTL, HSTL, PCI |