5CSEBA5U19A7N vs 5CSEBA5U23A7N Comparaison
Comparaison détaillée côte à côte de 5CSEBA5U19A7N par Intel et 5CSEBA5U23A7N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
5CSEBA5U19A7N - Cyclone V SE SoC FPGA, 85K LE, Dual ARM Cortex-A9 | Intel
5CSEBA5U19A7N ✓ ActifComparaison des spécifications
| Paramètre | 5CSEBA5U19A7N | 5CSEBA5U23A7N |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $152,40 | $205,00 |
| Family | Cyclone V SE SoC FPGA | Cyclone V SE SoC FPGA |
| Logic Elements | 85,000 | 85 K |
| Process Technology | 28 nm low-power | 28 nm low-power |
| Hard Processor System (HPS) | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| HPS Maximum Frequency | 700 MHz | 925 MHz |
| Boîtier | 484-pin UBG A (19x19 mm) | 672-UBGA (23x23 mm) |
| Type de montage | Surface Mount (BGA) | Surface Mount (BGA) |
| Supply Voltage (Core) | 1.1 V | — |
| Operating Temperature Grade | Automotive (AEC-Q100) -40C to +125C | Automotive / -40C to +125C (per Altera ordering code 'A') |
| I/O Count | 66 (per source listing) | — |
| Memory Interface | DDR3 controller in HPS; external memory interface in FPGA fabric | — |
| DSP Blocks | Variable-precision DSP blocks | — |
| Configuration / Boot Modes | NAND, QSPI, SD/MMC | — |
| Statut RoHS | Compliant (per Ampheo listing) | Compliant |
| Automotive Qualification | AEC-Q100 (Automotive grade, indicated by 'A' in part number) | — |
| Hard Processor System | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| FPGA Fabric Speed Grade | — | 7 |
| User I/O Count | — | 145 |
| Embedded Memory | — | 4,450 Kbits (approximate) |
| DSP Blocks (18x18) | — | 87 |
| PLLs | — | 6 (approximate, per device family) |
| Configuration Method | — | Serial (EPCS) or parallel flash with AES-128/256 |
| Niveau MSL | — | 3 (per JEDEC J-STD-020, typical for BGA packages) |