5CSEBA6U19I7N vs 5CSEBA6U19I7NTS Comparaison
Comparaison détaillée côte à côte de 5CSEBA6U19I7N par Intel et 5CSEBA6U19I7NTS par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
5CSEBA6U19I7N - Cyclone V SE SoC FPGA, 110K LE, Dual ARM Cortex-A9 800MHz | Intel
5CSEBA6U19I7N ✓ ActifIntel
5CSEBA6U19I7NTS - Cyclone V SE SoC FPGA, 110K LE, 925MHz, 484-UBGA | Intel
5CSEBA6U19I7NTS ✓ ActifComparaison des spécifications
| Paramètre | 5CSEBA6U19I7N | 5CSEBA6U19I7NTS |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $142,75 | $46,25 |
| Family | Cyclone V SE SoC FPGA | — |
| Series | 5CSEBA6 | Cyclone V SE |
| Device Variant | 5CSEA6 (U19 package, 110K LE) | — |
| Logic Elements | 110,000 | 110K |
| Hard Processor System | Dual-core ARM Cortex-A9 MPCore | — |
| HPS Maximum Frequency | 800 MHz | 925 MHz |
| Embedded Memory | 4.45 Mbits (M10K + MLAB) | — |
| Hard Memory Controller | DDR3, DDR3L, LPDDR2 | — |
| Transceivers | Up to 9 channels, 3.125 Gbps | — |
| DSP Blocks | 112 (18x18 multipliers) | [DATA_NEEDED: DSP block count] |
| PLLs | 6 (FPGA) + 3 (HPS) | — |
| User I/O Banks | 8 | — |
| Maximum User I/O | 288 (package-dependent) | — |
| Boîtier | 484-pin UBGAFBGA (UBGA-484, 19x19 mm) | 484-ball UBGA (19x19 mm) |
| Température de fonctionnement | -40C to +100C (Industrial) | -40C to +100C (Industrial, 'I7' speed grade) |
| Process Technology | TSMC 28 nm low-power | — |
| Tension d'alimentation | Multi-rail (1.1 V core, 1.5/1.8/2.5/3.0/3.3 V I/O) | — |
| Configuration Modes | JTAG, Active Serial (AS), Passive Serial (PS), Fast Passive Parallel (FPP) | — |
| Statut RoHS | Compliant | Compliant |
| Type de montage | Surface Mount (BGA) | Surface Mount (BGA) |
| Product Type | — | System-on-Chip FPGA (SoC FPGA) |
| HPS Core | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| FPGA Architecture | — | Cyclone V SE, 28 nm low-power process |
| Niveau MSL | — | [DATA_NEEDED: MSL rating] |
| Lead-Free | — | Yes |
| Configuration Method | — | SRAM-based, via Quartus Prime |
| Type de mémoire | — | DDR3/DDR3L with ECC support |
| HPS Peripherals | — | Gigabit Ethernet, USB 2.0 OTG, CAN, SPI, I2C, UART |
| Device Family | — | Cyclone V |
| Family Variant | — | SE (SoC FPGA with HPS) |