5CSEBA6U23I7N vs 5CSEBA4U23I7LN Comparaison
Comparaison détaillée côte à côte de 5CSEBA6U23I7N par Intel et 5CSEBA4U23I7LN par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | 5CSEBA6U23I7N | 5CSEBA4U23I7LN |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $51,80 | $99,75 |
| Family | Cyclone V SE SoC FPGA | Cyclone V SE SoC FPGA |
| Logic Elements | 110,000 | 40,000 |
| Process Technology | 28 nm TSMC low-power | 28nm TSMC low-power |
| Hard Processor System | Dual-core ARM Cortex-A9 MPCore with CoreSight | — |
| HPS Maximum Frequency | 800 MHz | — |
| DSP Blocks | 224 (variable-precision) | — |
| Embedded Memory | 5,662 Kbits (M10K + MLAB) | [DATA_NEEDED: exact embedded memory size in bits] |
| Maximum User I/O | 364 | — |
| Boîtier | 672-UBGA (UBG A-672) 23x23 mm | 672-pin UBGA (23x23 mm) |
| Core Voltage | 1.1 V | — |
| Température de fonctionnement | -40C to +100C (industrial, junction) | -40C to +100C (Industrial) |
| Speed Grade | 7 | — |
| Temperature Grade | Industrial (I) | — |
| Lead-Free / RoHS | Yes (Pb-free, N suffix) | — |
| DDR Controller | 32-bit DDR3/LPDDR2 with ECC | — |
| Configuration | FPGA + HPS integrated SoC | — |
| Processor Cores | — | Dual ARM Cortex-A9 MPCore |
| Processor Clock Speed | — | 925 MHz |
| Type de montage | — | Surface Mount |
| DSP Blocks (18x18 multipliers) | — | [DATA_NEEDED: exact multiplier count] |
| Transceivers | — | 3.125 Gbps (per Cyclone V family) |
| External Memory Interface | — | DDR3, DDR2, LPDDR2 (controller integrated in HPS + soft IP in FPGA fabric) |
| Niveau MSL | — | 3 |
| Statut RoHS | — | Compliant |
| Lead-Free | — | Yes |
| Sans halogène | — | [DATA_NEEDED] |
| Number of GPIOs | — | [DATA_NEEDED: per device variant] |
| Number of PLLs | — | [DATA_NEEDED: per device variant] |