5CSXFC6D6F31A7N vs 5CSXFC6D6F31C7N Comparaison
Comparaison détaillée côte à côte de 5CSXFC6D6F31A7N par Intel et 5CSXFC6D6F31C7N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | 5CSXFC6D6F31A7N | 5CSXFC6D6F31C7N |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $345,50 | $360,00 |
| Family | Cyclone V SX SoC FPGA | Cyclone V SoC FPGA |
| Logic Elements | 110,000 | 110K |
| Process Technology | 28 nm TSMC low-power | 28 nm low-power |
| Hard Processor System (HPS) | Dual-core ARM Cortex-A9 MPCore with CoreSight | — |
| Maximum HPS Clock Frequency | 700 MHz | — |
| Core Voltage | 1.1 V | 1.1 V |
| User I/O Count | 288 | — |
| Boîtier | 896-ball FBGA (31 x 31 mm) | 896-FBGA (31 x 31 mm) |
| Type de montage | Surface Mount (BGA) | Surface Mount |
| Operating Temperature Grade | Automotive / AEC-Q100 | — |
| Automotive Qualification | AEC-Q100 | — |
| Embedded Memory | Approximately 5.5 Mbits (M10K + MLAB) | — |
| DSP Blocks | Up to 224 (18 x 18 multipliers) | — |
| Hard Memory Controller | DDR2 / DDR3 / LPDDR2 / QDR II+ | — |
| Hard IP Peripherals | PCIe Gen2, GbE, USB 2.0 OTG, NAND, SD/MMC | — |
| Configuration | FPGA + HPS subsystem, integrated | — |
| Statut RoHS | Compliant | Compliant |
| Niveau de sensibilité à l'humidité (MSL) | [DATA_NEEDED: MSL level] | — |
| Series | — | Cyclone V SX |
| HPS Processor | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| HPS Max Frequency | — | 800 MHz |
| Temperature Grade | — | Commercial (0C to +85C) |
| Speed Grade | — | 7 |
| Niveau MSL | — | 3 |
| HPS DDR Controller | — | DDR3 up to 1066 Mbps, 32-bit |
| Transceivers | — | Up to 3.125 Gbps (channel count package-dependent) |