A3PE3000-FG324I vs A3PE3000L-FG324I Comparaison
Comparaison détaillée côte à côte de A3PE3000-FG324I par Microchip Technology et A3PE3000L-FG324I par Microchip Technology. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Microchip Technology
A3PE3000-FG324I - ProASIC3E FPGA 3M Gates 324-BGA | Microchip
A3PE3000-FG324I ✓ ActifMicrochip Technology
A3PE3000L-FG324I - 3M-Gate Flash FPGA, 221 I/O | Microchip
A3PE3000L-FG324I ✓ ActifComparaison des spécifications
| Paramètre | A3PE3000-FG324I | A3PE3000L-FG324I |
|---|---|---|
| Marque | Microchip Technology | Microchip Technology |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $1,00 | $0,00 |
| Family | ProASIC3E | ProASIC3L (Flash-based FPGA) |
| Logic Elements | 35K (per distributor listing) | — |
| System Gates | 3M (3,000,000 gates) | 3,000,000 |
| Maximum System Frequency | 231 MHz | — |
| Process Technology | 130 nm flash | 130 nm CMOS, 7-layer metal (6 copper), flash-based |
| Core Supply Voltage | 1.5 V | — |
| Number of I/Os | 221 | — |
| Configuration Memory | 516096 (internal flash, nonvolatile) | — |
| Boîtier | 324-BGA (FBGA) | 324-ball FBGA (FG324), 19x19 mm |
| Type de montage | Surface Mount | Surface Mount |
| Température de fonctionnement | -40C to +125C (industrial) | -40C to +100C (Industrial, I suffix) |
| Programming Type | In-System Programmable (flash, nonvolatile) | — |
| Embedded Memory | [DATA_NEEDED: embedded block RAM size] | — |
| Number of PLLs | [DATA_NEEDED: PLL count] | — |
| Supported I/O Standards | [DATA_NEEDED: I/O standard list] | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | Non-Compliant (FG package contains lead) |
| Niveau MSL | [DATA_NEEDED: moisture sensitivity level] | — |
| Logic Cells (CLBs) | — | 75264 |
| User I/O | — | 221 |
| Embedded SRAM | — | 516096 bits (up to 144 kbits true dual-port blocks per family) |
| Core Voltage | — | 1.2 V (1.2 V to 1.5 V supported) |
| Configuration | — | Nonvolatile flash, Instant On (Level 0 support) |
| Low Power Feature | — | Flash*Freeze technology |
| Max Frequency | — | [DATA_NEEDED: maximum system frequency] |
| JTAG Boundary Scan | — | IEEE 1149.1 |
| Input Option | — | Schmitt Trigger on single-ended inputs |
| Lead Free Status | — | Contains Lead |