A3PE3000L-FGG324 vs A3PE3000L-1FG324ID Comparaison
Comparaison détaillée côte à côte de A3PE3000L-FGG324 par Microchip Technology et A3PE3000L-1FG324ID par Microchip Technology. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Microchip Technology
A3PE3000L-FGG324 - ProASIC3L FPGA 3M Gates 221 I/O | Microchip
A3PE3000L-FGG324 ✓ ActifMicrochip Technology
A3PE3000L-1FG324ID - Low Power Flash FPGA 324-BGA | Microchip
A3PE3000L-1FG324ID ✓ ActifComparaison des spécifications
| Paramètre | A3PE3000L-FGG324 | A3PE3000L-1FG324ID |
|---|---|---|
| Marque | Microchip Technology | Microchip Technology |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $86,15 | $142,60 |
| Manufacturer Part Number | A3PE3000L-FGG324 | — |
| Family | ProASIC3L (Flash-based FPGA) | ProASIC3L Low Power Flash FPGA |
| System Gates | 3,000,000 | 3000000 gates |
| Logic Cells (CLBs) | 75264 | 75264 |
| User I/O | 221 | 221 |
| Configuration Memory | On-chip Flash (single-chip, nonvolatile) | — |
| Core Voltage Range | 1.2 V to 1.5 V | — |
| Tension d'alimentation de fonctionnement | 1.5 V | — |
| Maximum Operating Frequency | 250 MHz | [DATA_NEEDED: Fmax] |
| Special Features | Flash*Freeze Technology, Schmitt Trigger inputs, weak pull-up/down | — |
| Boundary Scan | IEEE 1149.1 (JTAG) | — |
| Boîtier | 324-BGA / FBGA (FGG324) | 324-BGA (FG324) |
| Style de montage | SMD/SMT | — |
| Température de fonctionnement | 0 C to +70 C (commercial) | Industrial (I grade) |
| Packaging | Tray | — |
| Embedded RAM | [DATA_NEEDED: embedded RAM capacity] | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | — |
| Core Voltage | — | 1.2 V to 1.5 V |
| Process Technology | — | 130 nm CMOS flash |
| Type de montage | — | Surface Mount |
| Technology | — | Flash-based (single-chip, reprogrammable) |
| Low Power Feature | — | Flash*Freeze Technology |
| Dynamic Power Reduction | — | 40% vs equivalent ProASIC3 |
| Static Power Reduction | — | 50% vs equivalent ProASIC3 |
| JTAG Boundary Scan | — | IEEE 1149.1 |
| Schmitt Trigger Input Option | — | Yes (single-ended inputs) |
| Weak Pull-Up/Pull-Down | — | Yes |
| Moisture Sensitivity Level | — | [DATA_NEEDED: MSL Level] |