A3PE3000L-FGG324I vs A3PE3000L-FG324I Comparaison
Comparaison détaillée côte à côte de A3PE3000L-FGG324I par Microchip Technology et A3PE3000L-FG324I par Microchip Technology. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Microchip Technology
A3PE3000L-FGG324I - ProASIC3L Flash FPGA 3M Gates | Microchip
A3PE3000L-FGG324I ✓ ActifMicrochip Technology
A3PE3000L-FG324I - 3M-Gate Flash FPGA, 221 I/O | Microchip
A3PE3000L-FG324I ✓ ActifComparaison des spécifications
| Paramètre | A3PE3000L-FGG324I | A3PE3000L-FG324I |
|---|---|---|
| Marque | Microchip Technology | Microchip Technology |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $62,65 | $0,00 |
| Family | ProASIC3L (Flash FPGA) | ProASIC3L (Flash-based FPGA) |
| System Gates | 3,000,000 | 3,000,000 |
| Total RAM Bits | 516096 | — |
| User I/O | 221 | 221 |
| Core Voltage | 1.2 V to 1.5 V | 1.2 V (1.2 V to 1.5 V supported) |
| Process Technology | 130 nm CMOS | 130 nm CMOS, 7-layer metal (6 copper), flash-based |
| Boîtier | 324-BGA FBGA (19x19 mm) | 324-ball FBGA (FG324), 19x19 mm |
| Type de montage | Surface Mount (SMD) | Surface Mount |
| Température de fonctionnement | -40C to +100C (industrial) | -40C to +100C (Industrial, I suffix) |
| Technology Features | Nonvolatile Flash, Instant On, Flash*Freeze | — |
| Configuration | Single-chip, no external boot PROM | Nonvolatile flash, Instant On (Level 0 support) |
| Packaging | Tray | — |
| Lead Free Status | Lead Free | Contains Lead |
| Statut RoHS | RoHS Compliant | Non-Compliant (FG package contains lead) |
| Number of Package Balls | 324 | — |
| Logic Cells (CLBs) | — | 75264 |
| Embedded SRAM | — | 516096 bits (up to 144 kbits true dual-port blocks per family) |
| Low Power Feature | — | Flash*Freeze technology |
| Max Frequency | — | [DATA_NEEDED: maximum system frequency] |
| JTAG Boundary Scan | — | IEEE 1149.1 |
| Input Option | — | Schmitt Trigger on single-ended inputs |