A42MX16-1VQG100I vs A42MX16-1VQG100 Comparaison
Comparaison détaillée côte à côte de A42MX16-1VQG100I par Microchip Technology et A42MX16-1VQG100 par Microchip Technology. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Microchip Technology
A42MX16-1VQG100I - 24K-Gate Antifuse FPGA, 100-TQFP | Microchip
A42MX16-1VQG100I ✓ Actif
Comparaison des spécifications
| Paramètre | A42MX16-1VQG100I | A42MX16-1VQG100 |
|---|---|---|
| Marque | Microchip Technology | Microchip Technology |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $1,00 | $20,70 |
| Family | 42MX (MX) Antifuse FPGA | MX (42MX) |
| System Gates | 24,000 | 24,000 gates |
| Logic Cells | 608 | — |
| User I/O | 83 | 83 |
| Tension d'alimentation | 3.3 V / 5 V | — |
| Process Technology | 0.45 um CMOS | — |
| Toggle Frequency | 119 MHz / 198 MHz | — |
| Speed Grade | -1 (standard) | -1 |
| Temperature Range | -40C to +85C (Industrial, I suffix) | — |
| Boîtier | 100-Pin VQFP/TQFP, 14x14x1 mm | 100-TQFP (VQG100) |
| Type de montage | Surface Mount | Surface Mount |
| Programmability | One-time programmable (antifuse, non-volatile) | — |
| Configuration Storage | Internal (no external boot PROM required) | — |
| Programming Interface | JTAG / boundary-scan (TDI-TDO chain) | — |
| Packaging | Tray | — |
| Statut RoHS | Compliant | Lead free (per distributor listing) |
| Lead Free | Yes (G suffix = lead-free / green) | — |
| Technology | — | Antifuse (one-time programmable) |
| Core Supply Voltage | — | 5.0 V |
| Température de fonctionnement | — | [DATA_NEEDED: commercial temperature range] |
| Programming Type | — | In-system antifuse programming (OTP) |
| Configuration Memory | — | None required (non-volatile) |
| Design Tool | — | Microchip Libero SoC |
| Registers / Logic Modules | — | [DATA_NEEDED: logic module count] |
| Boundary Scan | — | JTAG (TDI/TDO chain) |
| Niveau MSL | — | [DATA_NEEDED: MSL] |