A42MX24-2PLG84I vs A42MX09-2PLG84I Comparaison
Comparaison détaillée côte à côte de A42MX24-2PLG84I par Microchip Technology et A42MX09-2PLG84I par Microchip Technology. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Microchip Technology
A42MX24-2PLG84I - 36K Gate Antifuse FPGA, 84-PLCC | Microchip
A42MX24-2PLG84I ✓ ActifComparaison des spécifications
| Paramètre | A42MX24-2PLG84I | A42MX09-2PLG84I |
|---|---|---|
| Marque | Microchip Technology | Microchip Technology |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $55,40 | $29,80 |
| Family | MX (42MX) | MX (42MX) |
| System Gates | 36000 gates | 14000 |
| Logic Cells | 912 cells | 336 |
| User I/O | 72 | — |
| Technology | 0.45 um antifuse | — |
| Core Architecture Voltage | 5.0 V | — |
| I/O Voltage Support | 3.3 V / 5.0 V mixed | — |
| Speed Grade | -2 | -2 |
| Programmability | One-Time Programmable (antifuse) | — |
| Température de fonctionnement | -40C to +85C (Industrial) | -40C to +85C (Industrial) |
| Boîtier | 84-PLCC (J-Lead) | 84-PLCC (J-Lead), surface mount |
| Type de montage | Surface Mount | Surface Mount |
| Configuration | No external boot device required | — |
| Dedicated Decode Blocks | D-modules (wide-input AND, CPLD-like) | — |
| Statut RoHS | Lead Free (per Kynix listing) | Lead Free |
| Packaging | Tray | — |
| Primary Applications | ASIC alternative, legacy PLD integration | — |
| User I/O Pins | — | 72 |
| Core Supply Voltage | — | 4.5 V to 5.5 V |
| I/O Supply Voltage | — | 3 V to 3.6 V (dual supply) |
| Clock-to-Out | — | 5.6 ns |
| Dual-Port SRAM Access Time | — | 5 ns |
| Dual-Port SRAM | — | Up to 2.5 kbits configurable |
| Maximum Performance | — | 250 MHz |
| Process Technology | — | 0.45 um |
| Number of Logic Blocks | — | [DATA_NEEDED: number of logic blocks] |