A54SX72A-1CQ208B vs A54SX72A-1CQ208 Comparaison
Comparaison détaillée côte à côte de A54SX72A-1CQ208B par Microchip Technology et A54SX72A-1CQ208 par Microchip Technology. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Microchip Technology
A54SX72A-1CQ208B - 108K-Gate Antifuse FPGA 208-CQFP | Microchip
A54SX72A-1CQ208B ✓ ActifMicrochip Technology
A54SX72A-1CQ208 - 108K Gate Antifuse FPGA 208-CQFP | Microchip
A54SX72A-1CQ208 ✓ ActifComparaison des spécifications
| Paramètre | A54SX72A-1CQ208B | A54SX72A-1CQ208 |
|---|---|---|
| Marque | Microchip Technology | Microchip Technology |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $0,00 | $141,25 |
| Family | SX-A (Antifuse FPGA) | SX-A (Actel/Microchip antifuse FPGA) |
| System Gates | 108000 gates | 108000 gates |
| Logic Blocks (LABs/CLBs) | 6036 | — |
| User I/O | 171 | — |
| I/O Voltage Range | 2.25 V to 5.25 V | — |
| Speed Grade | -1 (fastest SX72A bin) | -1 |
| Maximum Toggle Rate (family) | up to 217 MHz | — |
| Global/Quadrant Clocks | CLKA, CLKB, QCLK quadrant clock networks | — |
| Process Technology | 0.22 um / 0.25 um CMOS antifuse | 0.25 um / 0.22 um CMOS |
| Program Type | One-Time Programmable (antifuse) | — |
| Température de fonctionnement | -55C to +125C (military B grade) | 0C to +70C (commercial) |
| Boîtier | 208-BFCQFP with tie bar (ceramic, 75x75 mm) | 208-pin CQFP (BFCQFP) with tie bar |
| Type de montage | Surface Mount | Surface Mount |
| Package Hermeticity | Hermetic ceramic | — |
| Design Security | Configuration not readable (antifuse OTP) | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | — |
| Supply Voltage (core) | [DATA_NEEDED: core supply voltage] | — |
| Logic Cells | — | 4024 cells |
| Logic Array Blocks (LABs) | — | 6036 |
| Dedicated Flip-Flops | — | 2012 |
| Maximum User I/O | — | 360 pins (device family maximum) |
| Core Supply Voltage | — | 2.5 V |
| Maximum Toggle Rate | — | 250 MHz |
| Programming Type | — | One-Time Programmable (antifuse) |
| Clock Resources | — | CLKA, CLKB global clocks plus quadrant clocks (QCLK) |
| Temperature Grade | — | C (Commercial) |