A54SX72A-PQG208A vs A54SX72A-1PQG208M Comparaison
Comparaison détaillée côte à côte de A54SX72A-PQG208A par Microchip Technology et A54SX72A-1PQG208M par Microchip Technology. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Microchip Technology
A54SX72A-PQG208A - 108K Gate Antifuse FPGA | Microchip
A54SX72A-PQG208A ✓ ActifMicrochip Technology
A54SX72A-1PQG208M - 108K-Gate Antifuse FPGA, 208-PQFP | Microchip
A54SX72A-1PQG208M ✓ ActifComparaison des spécifications
| Paramètre | A54SX72A-PQG208A | A54SX72A-1PQG208M |
|---|---|---|
| Marque | Microchip Technology | Microchip Technology |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $62,50 | $138,75 |
| Family | SX-A (Antifuse FPGA) | SX-A (Antifuse FPGA) |
| System Gates | 108,000 (up to 72,000 typical gates available) | 108000 |
| Logic Cells / Modules | 6036 CLBs | — |
| Dedicated Flip-Flops | 2012 | — |
| User I/O (Package) | 171 | — |
| Maximum User I/O (Family) | 360 | — |
| Process Technology | 0.25 um CMOS | — |
| Core Supply Voltage | 2.5 V | 2.5 V |
| I/O Standards | TTL, LVTTL, LVCMOS2, 3.3V PCI, 5V PCI | TTL, LVTTL, LVCMOS2, 3.3 V PCI, 5.0 V PCI |
| Maximum System Frequency | 217 MHz | — |
| Programming Type | One-Time Programmable (Antifuse) | One-Time Programmable (Antifuse) |
| Clock Inputs | 4 quadrant clock inputs (A, B, C, D) | — |
| Boîtier | 208-pin PQFP (PQG208) | 208-BFQFP (208-PQFP), surface mount |
| Type de montage | Surface Mount | Surface Mount |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: Operating Temperature] |
| Statut RoHS | [DATA_NEEDED: RoHS status] | Lead Free (per DigiKey/Jake Electronics listing: LEAD FREE) |
| Typical Gates | — | 72000 |
| Configurable Logic Blocks (CLBs) | — | 6036 |
| User I/O | — | 171 |
| Speed Grade | — | -1 |
| Maximum System Clock Frequency | — | 250 MHz (device family maximum) |
| Technology | — | 0.25 um / 0.22 um CMOS |
| Clock Networks | — | 4 quadrant clock inputs (CLKA-CLKD) + global clock network |
| Configuration Storage | — | Non-volatile (no external configuration PROM required) |