AD9235BRURL7-40 vs AD9235BRURL7-65 Comparaison
Comparaison détaillée côte à côte de AD9235BRURL7-40 par Analog Devices et AD9235BRURL7-65 par Analog Devices. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Analog Devices
AD9235BRURL7-65 - 12-Bit 65 MSPS ADC, 3V, TSSOP-28 | Analog Devices
AD9235BRURL7-65 ✓ ActifComparaison des spécifications
| Paramètre | AD9235BRURL7-40 | AD9235BRURL7-65 |
|---|---|---|
| Marque | Analog Devices | Analog Devices |
| Catégorie | ADC/DAC | ADC/DAC |
| Statut du cycle de vie | Obsolete | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $10,85 | $11,05 |
| Résolution | 12 bits | 12 bits |
| Fréquence d'échantillonnage | 40 MSPS | — |
| Number of Inputs | 1 | — |
| Architecture | Pipelined | Pipelined |
| Tension d'alimentation | 2.7 V to 3.6 V (single 3 V supply) | 3 V (2.7 V to 3.6 V) |
| Supply Current (typ @ 40 MSPS) | [DATA_NEEDED: supply current at 40 MSPS] | — |
| Power Dissipation (typ @ 40 MSPS) | 110 mW (typical) | — |
| Input Type | Differential (SHA), single-ended capable | — |
| Input Range | 1 Vp-p differential (with 2 Vp-p option) | — |
| SNR (typical) | [DATA_NEEDED: SNR dBFS] | — |
| SFDR (typical) | [DATA_NEEDED: SFDR dBc] | — |
| ENOB | [DATA_NEEDED: effective number of bits] | — |
| Analog Input Bandwidth | [DATA_NEEDED: input bandwidth MHz] | 500 MHz |
| Reference | Internal 2.5 V or external | Internal (on-chip) |
| Digital Interface | Parallel CMOS, 12-bit | — |
| Température de fonctionnement | -40°C to +85°C | — |
| Boîtier | 28-TSSOP (4.40 mm body width) | 28-TSSOP (4.40 mm body width) |
| Type de montage | Surface Mount | Surface Mount |
| Niveau MSL | [DATA_NEEDED: MSL level] | 1 (unlimited floor life) |
| Statut RoHS | Compliant (RU package suffix) | [DATA_NEEDED: RoHS status - not in web data] |
| Packaging | Tape & Reel (TR - R7) | — |
| Number of Channels | — | 1 |
| Sampling Rate (Max) | — | 65 MSPS |
| Power Consumption | — | 300 mW at 65 MSPS |
| Analog Input Range | — | 1 V p-p to 2 V p-p |
| Analog Input Type | — | Differential |
| SNR (to Nyquist, -1 dBFS) | — | 70 dBFS |
| SFDR (to Nyquist) | — | 85 dBFS |
| DNL | — | +/-0.4 LSB (typical) |
| Data Interface | — | Parallel (LVCMOS/TTL) |
| Output Format | — | Offset binary or twos complement |
| Clock Duty-Cycle Stabilizer | — | Yes (integrated) |
| Plage de température de fonctionnement | — | -40C to +85C |