AD9240ASRL vs AD9680BCPZ-1000 Comparaison
Comparaison détaillée côte à côte de AD9240ASRL par Analog Devices et AD9680BCPZ-1000 par Analog Devices. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | AD9240ASRL | AD9680BCPZ-1000 |
|---|---|---|
| Marque | Analog Devices | Analog Devices |
| Catégorie | ADC/DAC | ADC/DAC |
| Statut du cycle de vie | Dernier achat | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $43,42 | $0,00 |
| Résolution | 14 bits | 14 bit |
| Fréquence d'échantillonnage | 10 MSPS | — |
| Number of Analog Inputs | 1 input | — |
| Architecture | Pipelined | — |
| Digital Interface | Parallel | — |
| Tension d'alimentation | +5 V | 1.2 V / 2.5 V |
| Power Dissipation | 285 mW | — |
| Integral Nonlinearity Error | 2.5 LSB | — |
| Differential Nonlinearity Error | 0.6 LSB | — |
| Température de fonctionnement | -40 C to +85 C | — |
| Boîtier | 44-pin MQFP, 10 mm x 10 mm | 64-LFCSP (9 mm x 9 mm) |
| Type de montage | Surface mount | Surface Mount |
| Packaging | Tape and reel | — |
| Input Structure | Truly differential, compatible with single-ended and differential interfaces | — |
| Sample-and-Hold Amplifier | On-chip, low noise | — |
| List Price Starting From | $43.42 | — |
| Statut du cycle de vie | LAST TIME BUY | [DATA_NEEDED: current lifecycle status] |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| REACH Status | [DATA_NEEDED: REACH status] | [DATA_NEEDED: REACH status] |
| AEC-Q100 Qualification | [DATA_NEEDED: AEC-Q100 qualification] | — |
| Absolute Maximum Ratings | [DATA_NEEDED: absolute maximum ratings] | — |
| Product Type | — | Dual analog-to-digital converter |
| Number of Inputs | — | 2 inputs |
| Conversion Architecture | — | Pipelined |
| Maximum Sampling Rate | — | 1 GSPS for AD9680BCPZ-1000 |
| Family Sampling Rates | — | 1.25 GSPS, 1 GSPS, 820 MSPS, 500 MSPS |
| Interface | — | JESD204B |
| On-Chip Buffer | — | Yes |
| Sample-and-Hold Circuit | — | Yes |
| Channel Configuration | — | Dual, 2-channel |
| Sampling Circuit | — | On-chip sample-and-hold |
| Data Transfer Standard | — | JESD204B |
| Plage de température de fonctionnement | — | [DATA_NEEDED: operating temperature range] |
| Pinout | — | [DATA_NEEDED: complete 64-pin pinout] |
| Power Consumption | — | [DATA_NEEDED: power consumption] |
| SNR | — | [DATA_NEEDED: signal-to-noise ratio] |
| SFDR | — | [DATA_NEEDED: spurious-free dynamic range] |
| Plage de tension d'entrée | — | [DATA_NEEDED: analog input voltage range] |
| Tension de référence | — | [DATA_NEEDED: reference voltage] |
| JESD204B Lane Rate | — | [DATA_NEEDED: JESD204B lane rate] |