AD9434BCPZRL7-370 vs AD9434BCPZ-370 Comparaison
Comparaison détaillée côte à côte de AD9434BCPZRL7-370 par Analog Devices et AD9434BCPZ-370 par Analog Devices. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | AD9434BCPZRL7-370 | AD9434BCPZ-370 |
|---|---|---|
| Marque | Analog Devices | Analog Devices |
| Catégorie | ADC/DAC | ADC/DAC |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $138,07 | $138,07 |
| Résolution | 12 bit | — |
| Fréquence d'échantillonnage | 370 MSPS | — |
| Maximum Family Sampling Rate | 500 MSPS | — |
| Analog Input | 1 differential input | — |
| Conversion Architecture | Pipelined | — |
| Analog Supply | 1.8 V | — |
| Digital Output | LVDS-compatible | — |
| Supported Output Formats | Twos complement, offset binary, Gray code | — |
| Process Technology | BiCMOS | — |
| Boîtier | 56-lead LFCSP-VQ, 8 mm x 8 mm | 56-LFCSP-VQ, 8 mm x 8 mm |
| Température de fonctionnement | -40°C to +85°C | [DATA_NEEDED: operating temperature range] |
| Data Clock Output | Available for proper output-data timing | — |
| Data Formatting Control | Supported through serial port | — |
| Power-Down Control | Supported through serial port | — |
| Gain Adjustment | Supported through serial port | — |
| Output Test Pattern Generation | Supported through serial port | — |
| RoHS | Compliant | [DATA_NEEDED: RoHS status] |
| REACH | [DATA_NEEDED: REACH status] | [DATA_NEEDED: REACH status] |
| AEC-Q100 Qualification | [DATA_NEEDED: AEC-Q100 status] | — |
| Lead-Free Status | [DATA_NEEDED: lead-free status] | — |
| Halogen-Free Status | [DATA_NEEDED: halogen-free status] | — |
| Power Dissipation | 685 mW maximum for AD9434BCPZ-370 comparison source | — |
| AD9434 Pin Compatibility | AD9434 is stated to be pin compatible with AD9230 | — |
| ADC Resolution | — | 12 bit |
| Conversion Rate | — | 370 MSPS |
| Family Maximum Conversion Rate | — | 500 MSPS |
| Architecture | — | Pipelined |
| Analog Supply Voltage | — | 1.8 V |
| Input Type | — | Differential |
| Input Voltage | — | 1.5 Vp-p, as shown in verified comparison data |
| Digital Interface | — | LVDS |
| On-Chip Reference | — | Yes |
| Sample-and-Hold | — | On-chip |
| Serial Port Control | — | Data formatting, power-down, gain adjust, and output test pattern generation |
| Maximum Power Dissipation | — | 685 mW, as shown in verified comparison data |
| Type de montage | — | Surface mount |
| Recommended for New Designs | — | Yes |
| Input Bandwidth | — | [DATA_NEEDED: analog input bandwidth] |
| SNR | — | [DATA_NEEDED: SNR] |
| SFDR | — | [DATA_NEEDED: SFDR] |
| ENOB | — | [DATA_NEEDED: effective number of bits] |
| Digital Supply Voltage | — | [DATA_NEEDED: digital supply voltage] |
| Tension de référence | — | [DATA_NEEDED: reference voltage] |
| Output Coding | — | [DATA_NEEDED: output coding] |
| Output Data Rate | — | [DATA_NEEDED: output data rate] |
| MSL | — | [DATA_NEEDED: moisture sensitivity level] |
| AEC-Q100 | — | [DATA_NEEDED: AEC-Q100 qualification] |