ADC1413D080HN-C18 vs ADC1112D125HN-C18 Comparaison
Comparaison détaillée côte à côte de ADC1413D080HN-C18 par Renesas Electronics et ADC1112D125HN-C18 par Renesas Electronics. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Renesas Electronics
ADC1413D080HN-C18 - Dual 14-Bit 80Msps JESD204A ADC | Renesas
ADC1413D080HN-C18 ✓ ActifRenesas Electronics
ADC1112D125HN-C18 - Dual 11-bit 125MSPS ADC, LVDS/CMOS | Renesas
ADC1112D125HN-C18 ✓ ActifComparaison des spécifications
| Paramètre | ADC1413D080HN-C18 | ADC1112D125HN-C18 |
|---|---|---|
| Marque | Renesas Electronics | Renesas Electronics |
| Catégorie | ADC/DAC | ADC/DAC |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $32,10 | $9,48 |
| Number of Bits | 14 | — |
| Number of Inputs | 2 (differential) | — |
| Sampling Rate (Max) | 80 Msps | — |
| Architecture | Pipelined | — |
| Data Interface | Serial JESD204A | — |
| Input Type | Differential | Single-ended analog inputs (per channel) |
| Boîtier | 56-VFQFPN (8x8 mm) with exposed pad | HVQFN-64 (8x8 mm with exposed thermal pad) |
| Nombre de broches | 56 | — |
| Canaux | 2 simultaneous-sampling channels | — |
| Missing Codes | Guaranteed zero (with output error correction) | — |
| Plage de température de fonctionnement | [DATA_NEEDED: operating temperature range] | -40 C to +85 C |
| Supply Voltage (Analog) | [DATA_NEEDED: analog supply voltage] | — |
| Supply Voltage (Digital) | [DATA_NEEDED: digital supply voltage] | — |
| Power Consumption | Low (per Renesas product family claim) | — |
| Type de montage | Surface Mount | Surface Mount |
| Niveau MSL | [DATA_NEEDED: MSL moisture sensitivity level] | 3 (168 hours) |
| Statut RoHS | Compliant | Compliant |
| Résolution | — | 11-bit |
| Number of Channels | — | 2 (dual, simultaneous sampling) |
| Sample Rate (Max) | — | 125 Msps |
| Analog Supply Voltage (AVDD) | — | 3.0 V to 3.6 V |
| Digital I/O Supply (OVDD) | — | 1.8 V to 3.3 V |
| Output Interface | — | CMOS or LVDS DDR (selectable) |
| Reference | — | Internal programmable (0-6 dB in 1 dB steps) or external |
| Control Interface | — | SPI (3-wire, mode configuration) |
| Power-Down Mode | — | Yes, per-channel via SPI |